Low-temperature polysilicon display and method for fabricating same
Granted 17 Feb 2009 · 3 office actions
Current assignee: Optronic Sciences LLC · originally Acer Incorporated
Law firm: Law firm · Log in to unlock
Attorney: Attorney · Log in to unlock
Inventors: Chia-Tien Peng · Examiner: W. David Coleman · AU 2823 · TC 2800
Life of the application
16 dated eventsAbstract
A display panel comprising at least one display area and one peripheral circuit area having electronic components for driving the display components in the display area. The electronic components in the display area are fabricated substantially on a polysilicon layer converted from amorphous silicon by a solid phase crystallization process, whereas the electronic components in the peripheral circuit area are fabricated substantially on a polysilicon layer converted from amorphous silicon first by the solid phase crystallization process and then by laser annealing. As such, display area has a more uniform poly-Si layer substantially free of defects associated with laser annealing, and the peripheral circuit has a poly-Si layer with higher electron mobility.
Description
5 parts›FIELD OF THE INVENTION
The present invention relates generally to a display panel having a display area and an electronic circuit area and, more particularly, to a display panel made substantially of low-temperature polysilicon.
›BACKGROUND OF THE INVENTION
Polysilicon (poly-Si) thin-film transistors (TFTs) have been used in a flat-panel display such as an active matrix liquid crystal display (AMLCD) panel. The channel films for this type of display are typically deposited in the amorphous phase and then crystallized to form smooth, large grain polysilicon. In particular, solid-phase crystallization (SPC) is a promising technique for converting amorphous silicon (a-Si) into polysilicon. The crystallization from an amorphous phase to a poly-crystalline phase occurs through a nucleation process and a grain growth process. In a SPC Si system, it is desirable to achieve the largest possible grains, and therefore, it is desirable to suppress nucleation relative to grain growth. For that reason, SPC is typically carried out in low temperature. SPC using low-temperature furnace annealing requires very long anneal times and thus reduces the throughput of the product. Furthermore, crystalline defects detrimentally effect the performance of TFTs. While rapid thermal annealing (RTA) can increase the throughput, the performance of the TFT using RTA poly-Si is poorer than low-temperature crystallization. Voutsas et al. (U.S. Patent Publication No. 2004/0180481 A1) discloses a method for producing TFTs on a flexible substrate, wherein high-temperature oxidation is applied to a SPC poly-Si material in order to achieve poly-Si of a higher quality. However, this process requires temperatures in the range of 900 to 1150° C.
Laser annealing is another low-temperature annealing technique for converting a-Si into poly-Si. With laser annealing, the electron mobility is high and the overall quality of poly-Si is good. However, due to the instability if the laser beam, the poly-Si area so produced usually has perceptible non-uniformity known as laser mura. For this reason, poly-Si produced by laser annealing is generally not suitable for high-quality display panels.
›SUMMARY OF THE INVENTION
The present invention provides a method for producing a display panel on a substrate using LTPS technologies. The display panel comprises at least one display area and one peripheral circuit area having electronic components for driving the display components in the display area. In particular, the electronic components in the display area are fabricated substantially on a polysilicon (poly-Si) layer converted from amorphous silicon by a solid phase crystallization (SPC) process, whereas the electronic components in the peripheral circuit area are fabricated substantially on a polysilicon layer converted from amorphous silicon first by the SPC process and then by laser annealing. As such, display area has a more uniform poly-Si layer substantially free of defects associated with laser annealing, and the peripheral circuit has a poly-Si layer with higher electron mobility.
›BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic representation of a display panel, according to the present invention.
FIG. 2 is a schematic representation of a section of display panel, showing a number of driver ICs in the peripheral circuit area and a number of pixels in the display area.
FIG. 3A is a schematic representation showing an amorphous silicon layer along with a buffer layer disposed on a substrate.
FIG. 3B is a schematic representation showing the amorphous silicon layer converted into a polysilicon layer by solid-phase crystallization.
FIG. 3C is a schematic representation showing a section of the polysilicon layer by solid-phase crystallization re-processed by laser annealing.
FIG. 4 is a schematic representation of a switching element in the display area fabricated on a SPC poly-Si layer
FIG. 5 is a schematic representation of a switching element in the peripheral circuit area fabricated on a laser annealed poly-Si layer.
›DETAILED DESCRIPTION OF THE INVENTION
The present invention uses two different low-temperature polysicon (LTPS) processes to produce a first polysilicon (poly-Si) area and a second poly-Si area on a substrate. The first poly-Si area is mainly used for a display area of a display panel and the second poly-Si area is mainly used for a peripheral circuit area, as shown in FIG. 1 . For example, the display panel is an active matrix organic light-emitting diode (AMOLED) panel. The display area comprises a plurality of AMOLED pixels arranged in a two-dimensional array. The peripheral circuit area in the display panel includes a plurality of integrated circuits and bus-lines or connectors to provide data and control signals to the pixels. As shown in FIG. 2 , the integrated circuits in the peripheral circuit area include one or more DATA ASICs and one or more SCAN ASICs. The display area comprises a row of pixel ( 1 , 1 ), pixel ( 1 , 2 ), . . . that share a Scan line from the SCAN ASIC, and a column of pixel ( 1 , 1 ), pixel ( 2 , 1 ) . . . that share a Data line from the DATA ASIC. Each of the pixels ( 1 , 1 ), ( 1 , 2 ), ( 2 , 1 ), . . . has a number of switching elements (TFT 1 and TFT 2 ) and a light-emitting element (OLED), for example.
The polysilicon in the first poly-Si area is converted from amorphous silicon (a-Si) by a solid-phase crystallization (SPC) process. The polysilicon in the second poly-Si area is first converted from a-Si by the SPC process and then annealed by laser annealing. The a-Si to poly-Si conversion process is illustrated in FIG. 3A to FIG. 3C . As shown in FIG. 3A , an a-Si layer and a buffer layer (SiOx or SiNx/SiOx) are disposed on a substrate such as a glass substrate. As shown in FIG. 3B , the entire a-Si layer is converted to a poly-Si layer by SPC. However, only a selected portion of the SPC produced poly-Si is further processed by laser annealing as shown in FIG. 3C .
After the SPC poly-Si area and the laser annealed poly-Si area are produced on the same substrate, various electronic components required for the display area is fabricated in the SPC poly-Si area, as shown in FIG. 4 , and various electronic components required for the peripheral circuit are fabricated in laser annealed poly-Si area, as shown in FIG. 5 . FIGS. 4 and 5 are schematic representations of a switching element in the display area and the peripheral circuit area, respectively. Interconnection between the display area and peripheral circuit is achieved by fabricating electrically conductive connectors between the two areas. The fabrication processes for producing electronic components such as TFTs, AMOLEDs and connectors are known in the art.
In sum, in a display panel according to the present invention comprises at least a display area and a peripheral circuit area. Electronic components in the display area are fabricated on a polysilicon (poly-Si) layer converted from amorphous silicon by a solid phase crystallization (SPC) process, whereas electronic components in the peripheral circuit area are fabricated substantially on a polysilicon layer converted from amorphous silicon first by the SPC process and then by laser annealing. As such, the display area has a more uniform poly-Si layer substantially free of defects associated with laser annealing, and the peripheral circuit has a poly-Si layer with higher electron mobility. The interconnection between the display area and the peripheral area can be achieved by electrically conductive connectors.
The display area has a plurality of display elements such as organic light-emitting elements. These display elements can be arranged in a two-dimensional array. The display area further comprises a plurality of switching elements, such as TFTs, for controlling the display elements. The peripheral circuit area has one or more integrated circuits for providing data signals to the display area, and one or more integrated circuits for providing scanning signals to the array.
The properties of the poly-Si layer converted from amorphous silicon by a solid phase crystallization and the properties of the poly-Si layer further converted by laser annealing are summarized in the following table.
Typically, the electron mobility of the SPC-polysilicon is smaller than 70 cm 2 /Vsec, whereas the electron mobility of the laser annealed polisilicon is equal to or greater than 70 cm 2 /Vsec. Furthermore, the grain size of the SPC-polysilicon is typically in the range of a few hundred angstrom to a few thousand angstrom, whereas the grain size of the laser annealed polysilicon is typically in the range of a few thousand angstrom to a few micrometer, depending on the annealing laser and technology.
It should be noted that the electronic components shown in FIGS. 4 and 5 are for illustration purposes only. Moreover, the display panel as shown in FIG. 1 contains only one display area. However, two or more display areas can be fabricated on the display panel along with the peripheral circuit area.
Thus, although the invention has been described with respect to one or more embodiments thereof, it will be understood by those skilled in the art that the foregoing and various other changes, omissions and deviations in the form and detail thereof may be made without departing from the scope of this invention.
›Tables in the description — 1
| SPC-polysilicon | Laser-polysilicon | |
| Crystalinity | Low | High |
| Uniformity | Better | Poor |
| Threshold voltage | High | Low |
| Mobility | Low | High |
| Grain size | Small | Large |
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