Efficient thyristor-type power switches

This patent claims the benefit of provisional patent application 60/579,085 filed Jun. 14, 2004.

Combining GTOs (Gate Turn-Off thyristor) with MOSFETs yields new devices, including IGCTs (Integrated Gate Commutated Thyristors) and ETOs (Emitter Turn-Off thyristors). While these devices promise very high switching powers, they are relatively slow and exhibit high switching and conduction losses.

FIGS. 1 and 2 show diagrams of an IGCT and an ETO. The measurements shown in the original data of FIG. 3 demonstrate how the critical turn-off times decrease with decreasing temperature of a IGCT thyristor switch [Ref. 2]. It was earlier known that GTOs provide similar improved performance at reduced temperatures. Turn-on and delay times (not shown) are also improved. Many additional measurements on IGCTs and MTOs (MOSFETs in gate turn-off circuitry) are presented in reference 2, which is an unpublished report prepared by the inventors. These FIG. 3 curves demonstrate how decreasing the operating junction temperature improves performance.

The measurements in FIG. 3 were made cooling only the power device, the basic thyristor switch GTO. The driver circuitry was not designed for operation at cryogenic temperatures, and so was not cooled.

Many conventional circuit devices, especially those utilized in the driver circuitry, have been found to be inoperative at cryogenic temperatures. Additional advantages are obtained when thyristor drive circuits do incorporate selected components enabling performance at cryogenic temperatures.

The cryo IGCT ( FIG. 1 ) of the present invention drastically improves the performance of a conventional GTO by using selected components, cooling the device, and enforcing a “unity gain turn-off” gate current (gate turn-off current=anode current) using many MOSFETs situated in the gate turn-off circuitry (driver) and by reducing the gate loop circuit lead inductance.

The cryo ETO (Emitter Turn-Off thyristor) ( FIG. 2 ) in accordance with the invention goes a step further and adds a low-voltage MOSFET switch in series to the cathode of an IGCT type ( FIG. 1 ) device [1]. Thus, the ETO contains not one but two functionally essential MOSFET switches. Although the series MOSFETs add the MOSFET on-resistance voltage drop to the switch on-state voltage, by paralleling many low-voltage MOSFETs, this add-on resistance is made small.

Cryogenically cooling semiconductor devices can increase their switching speeds. The inventors have shown that the on-resistance of certain low-voltage (<100V) MOSFETs improves by a factor of approximately 8 to 10 when the MOSFETs are cooled from 400 K to 77 K (liquid nitrogen). Since the IGCT has one MOSFET switch and the ETO has two essential MOSFET switches, one in the gate and one in the emitter circuits, respectively, cryo-cooling the entire device including drive circuitry provides many benefits, including lower conduction losses, reduced switching losses, and higher-frequency operation.

The results are two new devices: The Cryo-IGCT and the Cryo-ETO (or SETO, as it is sometimes identified). These devices should accommodate the megawatt power range in many applications with reduced size, weight and cost, especially in all pulsed and low duty cycle applications, where the required refrigeration is lower. Due to the fact that the thermal conductivity of silicon and the substrate materials increases considerably with decreasing temperatures, conventional problems with hot spots and unequal current density distributions across the large thyristor chips (disks up to 90 mm in diameter by current production techniques) should also be alleviated by cryo-cooling. Problems related to di/dt and dv/dt should also be reduced. Another primary advantage of the cryo-IGCT and cryo-ETO is that these devices are compatible with superconducting devices and cables and therefore eliminate transitions between high and low temperatures.

Instead of cryogenically cooling the entire ETO or IGCT, it can also be beneficial to cool portions of the device while keeping other parts warm. Alternatively, a second GTO may be added in a circuit branch parallel to the original device, with each GTO in the circuit performing a separate function, for example, one GTO switching voltage and current, and the other conducting current. This concept, hybrid switch, is the subject of a filed patent application [3] disclosing its application to various other circuit types and devices.

The hybrid switch methodology can also be applied to the ETO. In the HY-SETO device shown in FIG. 4 , the switching function is accomplished using a cryo-cooled GTO, and the on-state conduction is handled by a second GTO that is warmer, e.g. approximately room temperature. The two GTOs are in similar ETO circuit branches that are connected in parallel. All emitter and gate MOSFET switches in FIG. 4 are cryo-cooled. High switching losses are a problem in all high-voltage thyristor-type circuits; here the increased switching speed of the Cryo-ETO at low temperatures alleviates these losses. In instances where the switching frequency is high, it may be beneficial to reverse the roles of the warm and cold GTOs, allowing the cryogenic GTO to conduct current while the warm GTO attends to the switching.

FIG. 1 is a functional block diagram of the Cryo-IGCT (Integrated Gate-Commutated Thyristor) in accordance with the invention;

FIG. 2 is a functional block diagram of the Cryo-ETO (Emitter Turn-Off Thyristor) in accordance with the invention;

FIG. 3 is a graph of IGCT turn-off time (voltage rise time) and delay time as a function of temperature for a current of 20 A and a voltage of 2000 VDC; and

FIG. 4 is an exemplary circuit diagram of the HY-SETO concept in accordance with the invention.

FIG. 1 is a functional block diagram of a Cryo-IGCT 10 and FIG. 2 is a Cryo-ETO 30 (also called a Super-ETO, or SETO). Each device is controlled by turn-on circuitry 20 and turn-off circuitry 22 ; both control circuits are best implemented using MOSFETs. The gate-cathode loop ( 18 , 12 and 18 , 36 ) inductance (not shown) is made as small as is physically possible. A gate turn-off thyristor (GTO) 14 , made, e.g., of large circular silicon disks, is the main power switch. Features of the IGCT 10 and the ETO 30 are the “unity current gain turn-off” MOSFET driver circuits 20 , 22 (gate turn off current equals anode current).

For the ETO 30 ( FIG. 2 ), several (N) paralleled low-voltage MOSFETs 34 (only one MOSFET 34 is illustrated to reduce drawing complexity) are series-connected to the cathode/emitter 36 of the GTO 14 . The MOSFETs 34 are driven by the MOSFET-based drive circuit 32 . (See U.S. application Ser. No. 10/857,118, ELAMP power systems, which is incorporated herein by reference.) The entire assembly, in each embodiment 10 , 30 is placed in a cryogenic container 24 , whereby the entire circuit assembly is cooled below room temperature, preferably to a cryogenic level where performances are enhanced. Cooling can be by liquid immersion or by conduction.

The complete IGCT or ETO circuit is held in a cryogenic container 24 , that is cooled, for example, immersed in cryogenic, liquid or gaseous, nitrogen, oxygen, argon, neon, helium, or other cryogenic fluids such as C8F8, or is conduction cooled to any suitable cryogenic temperature. The components, which are selected for their ability to perform at cryogenic temperatures, may alternatively be mounted to a heat sink and conduction cooled by coolant circulated through or over the sink by an external refrigerating system. Thermoelectric cooling elements may be used.

In this patent application, “cryogenic temperature” (cryo) is considered to be approximately 250 K and below. Systems have been constructed that demonstrated enhanced performance in the range of 77K to 250K, which range utilizes the relative economic advantage of liquid nitrogen (77K). Lower temperatures may be used. The cooling systems and coolants, which may be selected and utilized in making and using the present inventions, are not considered to be novel features, per se, of the present invention. Other factors, for example, size, weight, cost, coolant availability, system reliability, etc., may be decisive in such selection decisions so long as cryogenic temperature requirements are met.

The inventors have found in their testing that components and circuits that operate well in conventional environments, e.g. room temperature, may fail to function at cryogenic temperatures. Nevertheless, some components do continue to function at cryo temperatures, and some of these have enhanced performance as discussed above. Capacitors that are typically used in high energy driver circuitry are most likely to be inoperative at cryo temperatures, especially liquid filled components. Thin ceramic capacitors, film capacitors, and solid electrolytic capacitors were found to be more likely to operate well at cryogenic temperatures. Cryogenically qualified components are available from CryoCircuits LLC, Ballston Spa, N.Y. 12020.

In another embodiment 40 ( FIG. 4 HY-SETO), a ETO 44 is cryogenically cooled in the container 24 and is electrically in a branch parallel with a second ETO 42 , whose GTO is maintained outside the container 24 at a higher temperature. Both ETOs have their gate and emitter MOSFET circuitry 50 , 52 cryogenically cooled in the container 24 . The cryogenic ETO 44 , controlled at Gate 1 ( 48 ), switches voltage/current during on-time while the second ETO 42 , controlled at Gate 2 ( 46 ), handles the opposite function, i.e. conducting current. Alternatively, the cryogenic ETO 44 , controlled at Gate 1 ( 48 ), is used to conduct current during on-time while the second ETO 42 , controlled at Gate 2 ( 46 ), handles the opposite function, i.e. switching voltage/current. The MOSFET circuitry of the second ETO 42 could, alternatively, be kept warm, not in the container 24 , if that construction were easier to achieve physically.

1. Bin Zhang, et al.: “The High Power and High Frequency Operation of the Emitter Turn-Off (ETO) Thyristor”. CPES 2004 Power Electronics Seminar Proceedings, VPI Blacksburg, Va., Apr. 18-20, 2004, pp. 469-474.

2. MDA SBIR Interim Phase Final Report (unpublished), May 2002, Chapters 5 and 6 (MTECH Labs, Ballston Spa, N.Y. 12020).

3. Hennessy, M. J. and Mueller, E. K.: Hybrid Switch, U.S. patent application Ser. No. 10/670,810.