Sampled system agility technique
Granted 8 Dec 2009 · 3 office actions
Current assignee: CHARTOLEAUX KG LIMITED LIABILITY COMPANY · originally Larry Kirn
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Inventors: Larry Kirn · Examiner: Rexford N Barnie · AU 2819 · TC 2800
Life of the application
17 dated eventsAbstract
A method of modulating the sampling period of a sampled system with a factor N, and correcting the data stream of the sampling system with the same factor N, thus minimizing distortion artifacts induced by sample frequency modulation. At least a one-period delay from receipt of a new data stream value is used to avoid heterodyning with the incoming stream.
Description
6 parts›REFERENCE TO RELATED APPLICATION
This application claims priority to U.S. Provisional Patent Application Ser. No. 60/563,270, filed Apr. 16, 2004, the entire content of which is incorporated herein by reference.
›FIELD OF THE INVENTION
This invention relates generally to sampled systems and, in particular, to a method whereby open-loop an sampled system can operate at minimal distortion at a variable-frequency sampling rate.
›BACKGROUND OF THE INVENTION
Sampled systems, by their nature, generate alias product sum and difference frequencies around their sampling frequency, as well as numerous harmonics thereof. In many applications, such as AM radio receivers with switching output amplifiers, nearby circuitry may be deleteriously affected by one or more of a variable range of frequencies. Furthermore, objectionable sum and difference frequencies may be generated from interaction between a fixed-frequency sampled system and adjacent circuitry. In such cases, noise-modulated frequency control of the sampled system will disperse alias products across a wider bandwidth, minimizing their objectionability. Open-loop sampling systems, however, depend on a constant output integral gain for minimal distortion. A need exists for a method whereby open-loop sampled systems can operate at minimal distortion with variable-frequency sampling rate.
›SUMMARY OF THE INVENTION
The present invention resides in a method of modulating the sampling period of a sampled system with a factor N, and correcting the data stream of the sampling system with the same factor N, thus minimizing distortion artifacts induced by sample frequency modulation. Implicit in the above technique is at least a one-period delay from receipt of a new data stream value, so as to avoid heterodyning with the incoming stream.
›BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a timing diagram associated with a preferred embodiment of the present invention.
›DETAILED DESCRIPTION OF THE INVENTION
Referring now to FIG. 1 , pulsewidth modulated outputs of a sampled system at three different output sample rates are shown in traces 101 , 102 , and 103 . The same incoming datastream value is assumed for all three traces, and pulsewidths corrected by the invention are shown. The traces may represent voltage, current, or power; in an unspecified output configuration.
The output period of trace 101 is seen as the period between markers 104 and 109 , repeated between markers 109 and 115 . The output period of trace 102 is seen as the period between markers 104 and 108 , repeated between markers 108 and 113 . The output period of trace 103 is seen as the period between markers 104 and 110 , repeated between markers 110 and 116 .
Assuming positive-true output, the pulsewidth output of trace 101 can be seen to be the integral of the time period between markers 104 and 106 divided by the time period between markers 104 and 109 . This output repeats as the integral of the time period between markers 109 and 112 divided by the time period between markers 109 and 115 .
Referring now to trace 102 , it can be seen that the output sampling period between markers 104 and 108 (or 108 and 113 ) is substantially shorter than that of trace 101 between markers 104 and 109 (or 109 and 115 ). If the same datastream value resulting in the pulsewidth assertion between markers 104 and 106 ( 109 and 112 ) were directly applied to the sampling period of trace 102 , it can be seen that the integral of the time period between markers 104 and 106 divided by the time period between markers 104 and 108 would be significantly different than the integral of trace 101 described above.
By the present invention, the datastream value resultant in the pulsewidth between markers 104 and 106 of trace 101 is multiplied by the ratio of trace 102 period to trace 101 period, thereby providing a corrected datastream value resultant in the pulsewidth period between markers 104 and 105 . The pulsewidth can again be seen between markers 108 and 110 .
Referring now to trace 103 , it can be seen that the output sampling period between markers 104 and 110 (or 110 and 116 ) is substantially longer than that of trace 101 between markers 104 and 109 (or 109 and 115 ). If the same datastream value resulting in the pulsewidth assertion between markers 104 and 106 ( 109 and 112 ) were directly applied to the sampling period of trace 103 , it can be seen that the integral of the time period between markers 104 and 106 divided by the time period between markers 104 and 110 would be significantly different than the integral of trace 101 described above.
By the present invention, the datastream value resultant in the pulsewidth between markers 104 and 106 of trace 101 is multiplied by the ratio of trace 103 period to trace 101 period, thereby providing a corrected datastream value resultant in the pulsewidth period between markers 104 and 107 . The pulsewidth can again be seen between markers 110 and 114 .
By visual inspection, it can be seen that the integrals of traces 101 , 102 , and 103 are the same (within drawing tolerances) while the sampling periods are markedly different. The present invention can therefore be seen to mitigate pulsewidth distortions induced by sampling rate deviances. Use of the present inventions in systems utilizing static or dynamic output sampling frequency variances (of any waveform or waveforms) is anticipated.
Claims as granted
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8 codes- G11C27/02
- H03M1/00
- H03M1/82
- H03M5/08
- H03M1/10
- H03M1/08
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