CFL ballast with passive valley fill and crest factor control

This application is based on and claims priority of U.S. Provisional application Ser. No. 60/546,515 filed by the present inventors on Feb. 19, 2004 (IR-2672 Prov), incorporated by reference. It is related to Ser. No. 10/664,676 filed Sep. 18, 2003, entitled ADAPTIVE CFL CONTROL CIRCUIT (IR-2370), also incorporated by reference.

1. Field of the Invention

The present invention relates to a CFL (compact fluorescent lamp) ballast with a passive valley fill configuration, and more particularly to such a ballast with an arrangement for limiting crest factor.

2. Related Art

A known CFL ballast circuit is based on a resonant topology driven by a MOSFET half bridge. The CFL ballast circuit may be controlled by the IR2520 Ballast Control IC from International Rectifier Corp., which is described in the above-mentioned Ser. No. 10/664,676 and provides lamp preheat, lamp ignition, running mode and fault protection (lamp fault, open filaments, failure to strike, deactivated lamp and low AC line). Of course, other ballast and control circuits are known as well and the present invention is not limited to the specific examples herein.

In some applications it is desirable to have a regulated and boosted DC bus voltage and a high power factor, but conventional solutions such as an additional inductor, IC or FET can be expensive. For example, in a low-cost CFL below about 25 W, PFC is not often used because of cost, but this causes very high THD, and cannot prevent light output from varying with the AC line voltage.

To achieve a high power factor, a passive valley fill configuration has been used in the input stage. A diode and a resistor have been added to the standard passive valley fill configuration to reduce THD. However, the lamp current intrinsically has a high crest factor in a passive valley fill configuration because of the bus voltage shape. The crest factor is very high because the bus voltage changes between two different values, very different from each other: about VACpk and ½ VACpk. The current at the minimum bus voltage will be more than double the current at the maximum bus voltage and the intrinsic crest factor will be higher than 2. This condition exists in the case of constant frequency. Using a resistor to limit the harmonics increases the crest factor even further, because the minimum bus voltage decreases.

FIG. 1 shows (A) the bus voltage shape, (B) the lamp current shape, and (C) the lamp voltage shape in a circuit with passive valley fill configuration using a 1K resistor to reduce the harmonics.

To improve this situation, it would be desirable to implement a low-cost CFL ballast which can conform to new regulations, particularly in Asia, namely:

1) Total Harmonic Distortion (THD)<30% 2) Power Factor (PF)>0.85 3) Lamp Current Crest Factor Ipk/Irms (CF)<1.7 220-240 VAC, 14 watts.

To limit the crest factor an additional circuit has been included to modulate the frequency of the half-bridge in response to the DC bus voltage value. The circuit increases the frequency when the DC bus voltage increases above a threshold, thereby limiting the crest factor of the current. FIG. 2 shows the effect of the frequency modulation on the lamp current (B).

According to the disclosed embodiment of the invention, a circuit and method for stabilizing an operating characteristic of a compact fluorescent lamp driven by a ballast circuit having an operating frequency controlled by a component value, may comprise a first circuit connected to said ballast circuit for applying the component value thereto; and a second circuit connected to the ballast circuit for changing the component value so as to stabilize the operating characteristic. The operating characteristic may be power, current, voltage or crest factor for example.

The second circuit changes the component value in response to a bus voltage of the ballast circuit and includes a switching device such as a transistor responsive to the bus voltage. In the disclosed embodiment the component value is a resistance, the first circuit comprises a first resistor, the second circuit comprises a second resistor, and the switching device selectively connects the second resistor to said ballast circuit in response to the bus voltage exceeding a predetermined threshold.

Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.

FIG. 1 shows (A) bus voltage, (B) lamp current and (C) lamp voltage in a circuit with a passive valley fill configuration.

FIG. 2 shows (A) bus voltage, (B) lamp current and (C) lamp voltage in a circuit with a passive valley fill configuration and frequency modulation.

FIG. 3 is a schematic diagram showing a circuit according to an embodiment of the invention.

FIG. 4 shows lamp current in the circuit.

FIG. 5A shows (A) supply voltage VS and (B) lamp current at a minimum frequency fmin (e.g. 43.4292 kHz) for a minimum bus voltage, and FIG. 5B shows the same values at a maximum frequency fmax (e.g. 52.4672 kHz) for a maximum bus voltage.

FIG. 6 shows (A) bus voltage and (B) lamp current.

The circuit of FIG. 3 includes a resonant output stage (C 8 , L 2 ), rectification (D 1 , D 2 , D 3 , D 4 ), standard EMI filter and input stage (L 1 , C 1 , C 3 A, F 1 ), half bridge (Q 1 , Q 2 ), ballast control IC IR2520 (U 1 ), accessory circuitry for the IC (C 6 , C 4 , R 3 , C 5 ), charge pump to supply the IR2520 (R 2 , D 9 ), and snubber cap (C 7 ). A passive valley fill circuit (C 2 , C 3 , D 6 , R 1 , D 5 , D 7 ) is provided for low THD. A crest factor control circuit (R 4 , R 5 , Q 3 , R 6 ) is also provided. R 3 programs the minimum frequency of the IR2520. During steady state the IR2520 will oscillate at the minimum frequency in case of a zero voltage switching condition. If non-zero voltage switching is detected, the IR2520 frequency will increase automatically until it reaches zero-voltage switching operation. C 5 programs the startup time, setting the preheat time.

The crest factor is controlled by improving upon the known constant frequency operation and using two different frequencies: a minimum frequency for lower bus voltage and a higher frequency for greater bus voltage. Providing a higher frequency at the maximum bus voltage will reduce the voltage and current to the lamp, decreasing the maximum value the current will reach.

The crest factor control circuit generates two different frequencies, by adding a resistor R 6 in parallel with the resistor R 3 when the transistor Q 3 is on. The new working frequency of the IR2520 will depend on the combination of the parallel resistors R 6 and R 3 and will be greater than the frequency determined by R 3 alone. The transistor Q 3 will turn on when the voltage between base and emitter, which is determined by R 5 , exceeds the conduction threshold of the transistor Q 3 .

Summarizing, when the bus is low the IR2520 will oscillate at the minimum frequency, determined by R 3 . When instead the bus voltage exceeds a certain value (determined by R 5 and R 4 ), the IR2520 will oscillate at a higher frequency, determined by the parallel combination of R 3 and R 6 .

Following is a preferred but non-limiting procedure for selecting values for the components in FIG. 3 :

1) Select C 8 and L 2 to have an appropriate preheat on the lamp in the preheat time and an appropriate lamp power at about 40 KHz 2) Select C 5 to have an appropriate preheat time Increase C 5 to increase the preheat time 3) Select R 3 to have an appropriate minimum frequency (fmin), and input power slightly higher than the input power needed (14 W+4 W) Increase R 3 to decrease fmin and increase input power 4) R 1 reduces the THD and the harmonics related to the passive valley fill configuration:

Start with R 1 =0 and increase R 1 until THD is within spec. Higher R 1 will cause lower minimum bus voltage and so higher crest factor of the current and can cause multiple ignitions of the lamp, so R 1 should be selected as low as possible.

5) R 5 sets the bus voltage threshold value. When the bus voltage exceeds this threshold, the half-bridge frequency will start to increase above fmin

Adjust the value of R 5 so that the Vbus threshold is selected around (Vbus max−Vbus min)/2

6) R 6 sets the maximum frequency when the bus voltage is maximum, determined by the parallel R 3 and R 6

In operation, above the bus voltage threshold, there will be a range in which the frequency will be between fmin and fmax.

Start with R 6 =300K and decrease the frequency to decrease the crest factor. This operation will increase the maximum frequency fmax.

To decrease the crest factor either decrease R 6 to increase fmax and so the amount of frequency modulation, or adjust the value of R 5 . Decreasing the crest factor will decrease the input power (because changing R 1 will increase the time at fmax, or changing R 6 will keep the same time at a higher fmax). If the power decreases too much R 3 can be increased to decrease fmin.

7) Adjust (increase) again the value of R 3 to set an appropriate input power. This operation will increase the minimum frequency fmin.

In operation fmin depends also on C 8 if non-zero voltage switching occurs, because the IR2520 will work above fmin in the case of non-zero voltage switching. To avoid this C 8 can be increased.

8) Increase C 8 in case of non-zero voltage switching or to increase the preheat on the lamp if a longer lamp life is needed.

FIG. 4 shows the lamp current. Crest Factor=419/121.6=0.7. FIGS. 5A and 5B show the frequency modulation (the VS pin of the R2520 at (A), and the lamp current at (B). The two different frequencies are shown: fmin for minimum bus voltage and fmax for maximum bus voltage.

FIG. 6 shows (A) bus voltage and (B) lamp current.

An effective set of component values for the circuit is as follows: R 5 =1K, R 3 =76.2K, R 6 =300K, R 1 =560 ohms. Crest factor is 1.7 with these values.

It is possible to further improve the crest factor by the following steps:

Step 2) Decrease R 6 until an appropriate crest factor is obtained. With 250K crest factor is <1.7 and power is still acceptable (12.3 W).

Step 3) Increase R 3 to increase the input power if power becomes too low. If this does not increase power because of non-zero voltage switching (fmin does not decrease), increase C 8 (this will also improve the preheat).

The same crest factor control circuit (R 6 , Q 3 , R 5 and R 4 ) is useful in other circuit arrangements as well, such as a standard IR2520 configuration with bus capacitor and rectification, with the following beneficial results:

1) Stabilizing the lamp power (or current or voltage) in response to bus voltage changes due to AC line changes;

2) Allowing a smaller bus capacitor to be used in every type of CFL circuit; and

3) Reducing EMI through providing a frequency range instead of a constant frequency.

Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. Therefore, the present invention is not limited by the specific disclosure herein.