USPatent applicationPatented

Accurate voltage to current converters for rail-sensing current-feedback instrumentation amplifiers

Granted 10 Apr 2007 · 1 office action

Current assignee: Murata Manufacturing Co., Ltd. · originally Analog Devices

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Inventors: Behzad Shahi, Johan Hendrik Huijsing · Examiner: Robert Pascal · AU 2817 · TC 2800

Application· this page
11/054,140
filed 8 Feb 2005
Publication
Not published
not published
Patent
US 7,202,738
granted 10 Apr 2007

Life of the application

8 dated events
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Abstract

Accurate voltage to current converters for rail-sensing current-feedback instrumentation amplifiers using folded cascode transistors. Embodiments using various degrees of cascoding, as well as using bootstrapped folded cascoded input transistors are disclosed. Circuits for sensing around the negative rail are disclosed, though circuits for sensing around the positive rail may be readily achieved by use of complementary devices.

Description

4 parts
›BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to the field of instrumentation amplifiers.

2. Prior Art

Instrumentation amplifiers are often used to sense small differential voltages having a common mode voltage near the negative or positive supply-rail voltages. Instrumentation amplifiers with a so-called three operational amplifier (opamp) architecture are not able to sense in a range close to the rail unless separate level shifts are used at the input. More specifically, these architectures use voltage feedback around operational amplifiers to the input, and the feedback output voltage cannot go below the negative rail or above the positive rail without a level shift. Moreover, the voltage feedback around the opamp reduces its common mode rejection ratio.

There are two major options. Firstly, the rail sensing can be obtained with switched or ‘flying’ capacitors [Ref. 1: LTC6800 Spec. sheet]. This has the disadvantage of a relative low bandwidth. Secondly, the rail sensing can be achieved by a continuous-time current feedback instrumentation amplifier [Ref. 2: Bernard van den Dool], [Ref. 3: U.S. Pat. No. 6,559,720]. A general block diagram for such an amplifier is shown in FIG. 1 .

Instrumentation amplifiers with current feedback for sensing at the rail voltage conventionally use simple voltage-to-current (V-I) converters, as shown in FIG. 3 [Ref. 2: Berhard van den Dool]. The non-linearity of these simple V-I converters cancels when used in an instrumentation amplifier as shown in FIG. 1 . The relative high offset, and poor common-mode rejection ratio (CMRR), can be largely improved by the chopper instrumentation amplifier architecture of FIG. 2 . But residual inaccuracies and non-linearities of the simple differential amplifier stages of the order of 0.1% are still too much for accurate applications. Therefore, ways to improve the accuracy are desired.

Voltage feedback or voltage boosting can be applied around the P-channel input transistors to improve their accuracy, as shown in FIG. 4 . Voltage feedback reduces the influence of the input transistors on the accuracy and linearity. The result is that the transconductance G of the input stages is fully determined by the source resistors R s , so that G becomes equal to G=2/(R S1 +R S2 ). These resistors can be chosen as both accurate and linear. However the ability to sense around the negative supply rail is lost again in the architecture of FIG. 4 , because the output voltages of the operational amplifiers cannot be drawn below the negative supply rail voltage.

›BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a prior art current feedback instrumentation amplifier using voltage to current (V-I) converters on the input and output feedback amplifiers.

FIG. 2 is a block diagram of a prior art chopper stabilized current feedback instrumentation amplifier using voltage to current (V-I) converters on the input and current feedback amplifiers.

FIG. 3 is a circuit diagram for a conventional V-I converter for a current-feedback instrumentation amplifier that can sense around the negative supply rail.

FIG. 4 is a diagram for a conventional V-I converter using voltage feedback or voltage boosting around the P-channel input transistors to improve their accuracy.

FIG. 5 is a diagram similar to that of FIG. 4 , but with the polarity of the connection to the input of the operational amplifiers reversed, and with complementary N-channel output transistors.

FIG. 6 is a circuit diagram for a V-I converter using folded cascode transistor pairs on the input.

FIG. 7 is a circuit diagram for a V-I converter similar to that of FIG. 6 , further cascading the cascode transistors of FIG. 6 .

FIG. 8 is a circuit diagram for a V-I converter similar to that of FIG. 6 , but using active current sources on the input transistors.

FIG. 9 is a circuit diagram for a V-I converter similar to that of FIG. 7 , but further cascading the input transistors of FIG. 7 .

FIG. 10 is a circuit diagram for a V-I converter with bootstrapping of the folded cascode transistors M 15 and M 16 toward the common-source point of transistors M 11 and M 12 , instead of applying straight cascode transistors M 111 and M 121 as in FIG. 9 .

FIG. 11 is a circuit diagram for a V-I converter in accordance with the present invention with gain boost in the folded cascodes.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS · 1 of 2

To solve the problems stated in the introduction, one can reverse the polarity of the connection to the input of the operational amplifiers and use complementary N-channel output transistors, as depicted in FIG. 5 . If the negative inputs of the operational amplifiers are able to sense around the negative rail, and if one internal transistor voltage shift upward is applied to the positive input of the operational amplifiers, then the circuit of FIG. 5 approaches the goal. But the solution of FIG. 5 has still a number of disadvantages. Firstly, the noise of the differential input pair of the operational amplifiers is added to the noise of the instrumentation amplifier. Secondly, a simple circuit is desired. Particularly, when this V-I converter is used in the chopper instrumentation amplifier of FIG. 2 , many parasitic capacitors cannot be tolerated. Thirdly, the loop gain is decreased by the source degeneration resistors R S1 and R S2 of the output transistors M 1 and M 2 . Hence, the operational amplifiers need a high voltage gain.

The circuit of FIG. 6 shows the transistor implementation of an embodiment of the present invention. Only one sense transistor M 11 or M 12 per side is between the input and the gain and linearity setting resistor R 11 or R 12 . So the noise and offset contribution is nearly equal to the simple differential pair of FIG. 3 . The input sense transistors are terminated by drain resistors R 15 or R 16 acting as current sources. The folded cascode transistors M 15 and M 16 collect any excess current by which the output transistor M 13 and M 14 are driven. The circuit is simple. However the transconductance of the composite input transistor G 1,2 =A V15,16 /R 13,14 is still relatively low. The voltage gain in the loop is:

A V15,16 ≈μ 11,12 μ 15,16

μ 11,12 ≈G m11,12 ×R DS11,12 and

μ 15,16 ≈G m15,16 ×R DS15,16

The transconductance of the input transistors has roughly been increased by the maximum voltage gain μ 15,16 ≈30 in regard to the conventional circuit of FIG. 3 . The circuit basically satisfies the specification, though it would be desirable to further improve the loop gain.

In order to further increase the loop gain, the folded cascode transistors M 15 and M 16 can be cascoded by transistors M 15 , and M 161 , as depicted in FIG. 7 . Now the transconductance of the composite input transistors is increased by a factor μ 15,16 ×μ 151,161 ≈1000 in comparison to the conventional circuit of FIG. 3 . Finally, to decrease the influence of a common-mode voltage on the output current, the output transistors M 13 and M 14 have also been cascoded by transistors M 13 , and M 141 . The result is an accurate and linear overall transconductance G=2/(R 11 +R 12 ).

The resulting offset and CMRR are still comparable with those of a single pair as shown in FIG. 3 . A large decrease of the offset and increase of the CMRR can be obtained if the accurate composite V-I converter is used for the V-I converters G 3 and G 4 , together with choppers, in the amplifier of FIG. 2 .

Alternatively to the straight-cascoding of transistors, one can also improve the folded-cascode function of M 15 and M 16 in FIG. 6 by replacing the source resistors R 15 and R 16 by active current sources I 15 and I 16 , respectively. This is shown in FIG. 8 . The gains of the folded cascodes M 15 and M 16 will be increased by these current sources so that no cascoding of M 15 and M 16 is needed. To minimize the voltage drop across I 15 and I 16 , one can gain-boost the transistors M 15 and M 16 by controlling their gate voltages by the output of simple differential amplifiers, so that their source voltages remain equal to a reference voltage. This voltage-boost is shown in FIG. 11 .

To further improve the CMRR of the V-I converter of FIG. 7 , it is desirable to cascode the input transistors to reduce the influence of a change of their drain-source voltages. This can be done by cascode transistors M 111 and M 121 in series with M 11 and M 12 , respectively, as shown in FIG. 7 . To insure that transistors M 11 and M 12 are not biased in the triode region, the threshold voltages V T of transistors M 11 and M 12 will be at least 0.2 volts higher than those of transistors M 111 and M 121 . These cascodes can also be applied in FIG. 8 .

Improvement of the CMRR of the V-I converter can also be obtained by bootstrapping the folded cascodes M 15 and M 16 toward the common-source point of M 11 and M 12 , instead of applying straight cascode transistors M 111 and M 12 , as in FIG. 9 . This is shown in FIG. 10 . The gates of transistors M 15 and M 16 are now connected to the upper side of resistor R T , connected in series with the current source for resistors R 11 and R 12 . This takes the gates of transistors M 15 and M 16 to a slightly higher voltage in regard to the source voltages of transistors M 11 and M 12 . This higher voltage is needed to provide room for allowing the inputs to sense below the negative power supply rail. Another folded cascode pair, transistors M 17 and M 18 , is now needed to allow an independent input common mode range in regard to the output voltage range.

Now referring to FIG. 11 , a V-I converter in accordance with the present invention with gain boost in the folded cascodes may be seen. In this embodiment, components with the same identifications as in FIG. 6 perform substantially the same functions. Here however, current sources I 3 , I 4 , I 17 and I 18 and transistors M 17 thorough M 20 have been added. Transistors M 19 and M 20 sense the voltages across the resistors R 15 and R 16 . These resistors carry the currents of the input transistors M 11 and M 12 . If any change of these currents or voltages occurs, the folded cascode transistors M 15 and M 16 receive correction signals on their gates by the gain boost amplifier transistors M 19 , M 17 and M 20 , M 18 . These correction signals regulate transistors M 15 and M 16 such that their source voltages remain constant, and so the currents through resistors R 15 and R 16 , and so the currents of the input transistors M 11 and M 12 , and so the gate source voltages of the input transistors. This means that the transconductance of the V-I converter is more accurately determined by resistors R 11 and R 12 alone.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS · 2 of 2

Thus there are disclosed embodiments of accurate and linear V-I converters with composite input transistors for use in current-feedback instrumentation amplifiers. The V-I converters are able to sense differential input voltages in a range around the negative supply rail, though complementary circuits can be used for sensing around the positive supply rail. The V-I converter combines simplicity and accuracy with a minimum offset.

While CMOS circuits have been disclosed, one can realize the present invention using bipolar transistors or combinations of bipolar and CMOS transistors. Thus while certain preferred embodiments of the present invention have been disclosed and described herein for purposes of illustration and not for purposes of limitation, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.

Claims as granted

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Classifications

3 codes
IPC · International Patent Classification
Section H — Electricity
  • H03F3/45
USPC · US Patent Classification
330/253330/252

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Pendency
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791 days filing → grant
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Examiner
Robert Pascal
art unit 2817 · TC 2800
Citations: 15 back · 21 forward

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