Liquid crystal display module

This application claims the benefit of Taiwan application Serial No. 092128770, filed Oct. 16, 2003, the subject matter of which is incorporated herein by reference.

1. Field of the Invention

The invention relates in general to a liquid crystal display module, and more particularly, to a liquid crystal display module with short-circuit protection for the test circuit.

2. Description of the Related Art

In order to reduce the failure rate of the polarizer during the manufacturing process of liquid crystal display (LCD), the original function test is re-scheduled forward. The pre-test for the substrate of thin film transistor (TFT) is now re-scheduled and is done prior to the pasting of the polarizer, so that faulty TFT glass substrates can be found earlier and the pass rate during the manufacturing process can be improved.

Referring to FIG. 1 , a partial block diagram of the circuit layout according to a conventional test circuit. A number of indium tin oxide (ITO) leads (under ITO layer have others metal) 106 a , 106 b , 106 c and 106 d are deposited on one side of TFT glass substrate (not shown in FIG. 1 ) in equal distance. Test circuit 102 includes a number of metal wires 102 a , 102 b and 102 c . Test circuit 102 is also deposited on the TFT glass substrate. Traces 104 a , 104 b , 104 c and 104 d are electrically connected to their corresponding ITO leads 106 a , 106 b , 106 c and 106 d . The trace 104 and test circuit 102 are electrically connected together via contact hole 112 , while test circuit 102 and its corresponding ITO lead 106 are electrically connected together in a shortest straight line by trace 104 .

Prior to the pre-test, the TFT glass substrate is electrically connected to a test unit 114 via test circuit 102 and is tested by test unit 114 .

Referring to both FIG. 2 and FIG. 3A at the same time. FIG. 2 is a partial block diagram showing the connection between tape carrier package leads (TCP leads) and indium tin oxide (ITO) leads according to prior arts while FIG. 3A is a sectional view along the sectional line 3 A– 3 A′ in FIG. 2 . Test circuit 102 is covered up by a first passivation layer 308 for isolating and protecting the test circuit. Traces 104 a, 104 b, 104 c and 104 d are covered up by a second passivation layer 110 . When the pre-test is completed, a laser beam is used to burn trace 104 and have it separated to form an electrically isolated region which is be further extended to form a laser cutting path 108 . After that, TCP lead 202 is sealed to its corresponding ITO lead 106 on glass substrate 302 using heat sealing process.

Referring to FIG. 3A , the manufacturing process for sealing the TCP leads to the glass substrate is elaborated below. First, pasting an anisotropic conductive film (ACF) 306 on ITO lead 106 b. Next, TCP lead 202 b and ITO lead 106 b are mounted together and pressed downward, so that TCP lead 202 b is sealed and electrically connected to ITO lead 106 b via ACF 306 . Meanwhile, TCP and glass substrate 302 are connected together as well.

Referring TO FIG. 3A , TCP whose IC chips are not shown here includes three layers, namely, soft tape layer 310 which uses polyimide (PI) as the base material, copper plating layer 312 , and solder resist layer 314 , wherein TCP lead 202 b is formed on copper plating layer 312 to be electrically connected to ITO lead 106 b.

Referring to FIG. 3B , an enlargement of region A in FIG. 3A . In the conventional process disclosed above, the laser cutting process performs an instant high-temperature heat treatment on trace 104 . Consequently, trace 104 is melted and cut off to form a laser cutting path 108 whereby metal wire 102 b is electrically disconnected from ITO lead 106 . However, during the high-temperature melting process, trace 104 b might spread over the top-face of second passivation 110 and leave metal remnants 316 thereon. When TCP lead 202 b is to be sealed to ITO lead 106 b, TCP lead 202 b will contact with metal remnants 316 at the break-points on trace 104 b resulting in short circuits. Under this circumstance, malfunction in TFT substrate will arise and lead to in a high rejection rate.

It is therefore an object of the invention to provide a liquid crystal display module with short-circuit protection for the test circuit to reduce the rejection rate of the TFT substrate.

It is therefore an object of the invention to provide a liquid crystal display module including a substrate, one or more first leads, one or more shorting bars. one or more second leads and one or more cutting traces. The first leads are disposed over the periphery of the substrate. The shorting bars are disposed over the substrate edge. The shorting bars are adjacent to the end of first leads and electrically connected to the corresponding first leads via one or more connecting lines. The second leads are mounted with the corresponding first leads respectively and are electrically connected to the corresponding first leads. The cutting traces are used for electrically disconnecting the first leads from the shorting bars. The intersection of the each cutting trace and connecting line is located between every two adjacent second leads. A laser beam is used to cut off the connecting lines along the cutting trace after the liquid crystal display module has been tested, so that the short bar is electrically disconnected from the first leads, and a disconnecting point is formed on the intersection of the each cutting trace and connecting line.

Other objects, features, and advantages of the invention will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings.

FIG. 1 (Prior Art) shows a partial block diagram of the circuit layout according to a conventional test circuit;

FIG. 2 (Prior Art) is a partial block diagram showing the connection between tape carrier package leads (TCP leads) and indium tin oxide (ITO) leads according to prior arts;

FIG. 3A (Prior Art) is a sectional view along the sectional line 3 A– 3 A′ in FIG. 2 ;

FIG. 3B (Prior Art) is an enlargement of region A in FIG. 3A ;

FIG. 4 shows a partial block of the TFT substrate according to a preferred embodiment of the invention;

FIG. 5 is a diagram of a partial block of the liquid crystal display module according to the invention showing the status when TCP leads is mounted with ITO leads;

FIG. 6A is a sectional view along the sectional line 6 A– 6 A′ in FIG. 5 ; and

FIG. 6B is a sectional view along the sectional line 6 B– 6 B′ in FIG. 5 .

Referring to FIG. 4 , a partial block of the TFT substrate according to a preferred embodiment of the invention, and FIG. 5 , a diagram of a partial block of the liquid crystal display module according to the invention showing the status when TCP leads and ITO leads are mounted together. A test circuit includes two shorting bars 402 a and 402 b wherein the two shorting bars which are deposited in parallel and are situated to the external of first leads 406 , are electrically connected together via a number of corresponding connecting lines 404 . Besides, shorting bars 402 a and 402 b are electrically connected to an external test unit 414 whereby liquid crystal display module is tested. That is to say, test unit 414 sends out a pre-test signal, which arrives at connecting lines 404 a, 404 b, 404 c and 404 d via shorting bars 402 a and 402 b and is further transmitted to first leads 406 a, 406 b, 406 c and 406 d via connecting lines 404 . In one embodiment, the first leads comprise a number of indium tin oxide (ITO) leads. In other embodiment, the first leads comprise metal. The shorting bars comprise a number of metal wires, and the connecting lines comprise a number of metal wires.

Connecting lines 404 , which are covered up by a second passivation layer 410 , can be electrically connected to their corresponding shorting bars 42 a and 402 b via a number of via holes 608 . After the liquid crystal display module has been tested by test unit 414 , a laser beam will perform laser cutting along a cutting trace 408 ; after that, each of second leads 502 is mounted with its corresponding first lead 406 and is sealed thereto. The intersections of cutting trace 408 and connecting lines 404 a , 404 b , 404 c and 404 d form corresponding disconnecting points 504 a , 504 b , 504 c and 504 d through which shorting bars 402 are electrically disconnected from ITO leads 406 . In one embodiment, the second leads comprise a number of tape carrier package(TCP) leads. In other embodiment, the second leads comprise metal.

As shown in FIG. 4 , partial segments on connecting line 404 are arranged in L-shaped form, wherein the L-shaped segment has a line segment deposited in a vertical direction. Since the partial segments on connecting line 404 are arranged in a form like an L, each of the disconnecting points 504 formed at the intersections of cutting trace 408 and the line segment of the L-shaped segment will be situated between every two adjacent second leads 502 . For example, disconnecting point 504 a formed on the intersection of the cutting trace 408 and line segment of connecting line 404 a is situated between second leads 502 a and 502 b . The disconnecting points 504 can be situated to the right of their corresponding second leads 502 as shown in FIG. 5 . Nevertheless, disconnecting points 504 can also be situated to the left of their corresponding second leads 502 .

According to the above arrangement, metal remnants, though might still spread over second passivation layer 410 , will not contact with second leads 502 during the sealing process thereof. Consequently, short circuits will not occur during the sealing process.

Referring to FIG. 6A , a sectional view along sectional line 6 A– 6 A′ in FIG. 5 , and FIG. 6B , a sectional view along sectional line 6 B– 6 B′ in FIG. 5 . Two shorting bars 402 a and 402 b are deposited on substrate 602 in parallel and are further covered up by a first passivation layer 606 for isolating and protecting the test circuit. In one embodiment, the substrate 602 can be a glass substrate. The first passivation layer 606 has a number of via holes through which connecting lines 404 are electrically connected to their corresponding shorting bars 402 a and 402 b . For example, connecting line 404 c is electrically connected to shorting bar 402 a through via hole 608 . The TCP has three layers, namely, polyimide (PI) layer 610 , copper plating layer 612 and solder resist (SR) layer 614 . Using ACF 604 as an adhesive and a conductive medium, a test signal can be transmitted to first leads 406 c via copper plating layer 612 .

Only second passivation layer 410 can be found at the intersection of the cutting trace 408 and the section line 6 A– 6 A′ in FIG. 6A ; connecting line 404 c does not pass through there. When second lead 502 c is sealed downward during the hot sealing process, not any metal remnants can be found between second lead 502 c and cutting trace 408 . So, electrical short circuit will by no means occur between the second layer of second lead 502 c, ie copper plating layer 612 , and the metal remnants left at disconnecting point 504 c.

Referring to FIG. 6B and FIG. 5 at the same time. Since the disconnecting point 504 c along the section line 6 B– 6 B′ is situated between second leads 502 c and 502 d, the metal remnants at disconnecting point 504 c will by no means contact with second leads 502 c and 502 d. Consequently, short circuit can be totally avoided therein.

The short-circuit protection for test circuit disclosed in the above preferred embodiment according to the invention has the advantage of avoiding the occurrence of short circuit between disconnecting points caused by laser cutting and the TCP leads during the sealing process of the leads.

While the invention has been described by way of example and in terms of a preferred embodiment, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.