Mechanism for preventing ESD damage and LCD panel utilizing the same

1. Field of the Invention

The present invention relates to ESD protection, and in particular to a mechanism for preventing ESD damage in an electronic device.

2. Description of the Related Art

FIG. 1 is a schematic diagram of signal lines of a conventional liquid crystal display (LCD) panel. The LCD panel comprises a pixel array 12 , a plurality of connection areas 10 and a plurality of fan-out signal lines F 1 to F n . Integrated circuits such as a data driver and a scan driver drive the pixel array 12 to display images. As shown in FIG. 1 , each connection area 10 has a plurality of pads P 1 to P n arranged sequentially for mounting to the corresponding integrated circuit. The fan-out signal lines F 1 to F n are extend from the pads P 1 to P n respectively. The integrated circuits can provide driving signals, such as scan signals and data signals, to the pixel array 12 through the fan-out signal lines F 1 to F n . Also, the integrated circuits can receive external signals through the fan-out signal lines F 1 to F n .

A thin film transistor (TFT) LCD panel is handled by several machines and operators during the manufacturing process. When a machine or operator generates and transmits electrostatic discharge (ESD) to the TFT LCD panel, signal lines of the TFT LCD panel are open or short, resulting in reduced yield and damage to internal elements. The resulting TFT LCD panel displays abnormal bright or dark lines. TFT LCD panels typically comprise an ESD protection device to prevent ESD from damaging the TFT LCD panel.

Referring to FIG. 1 , a conventional method of protecting an LCD panel provides a plurality of ESD protection devices ES 1 to ED n disposed corresponding to the fan-out signal lines F 1 to F n . All the ESD protection devices usually have a virtually equal impedance. When ESD occurs in the TFT LCD panel, the ESD protection device of each signal line disposed on outermost side of the connection area 10 has the longest path. Therefore, the electrostatic charges do not disperse and the effectiveness of the protection offered by the ESD protection device is not maintained.

Accordingly, an object of the present invention is to provide a mechanism for preventing ESD damage in an electronic device, such as an LCD panel. The ESD protection devices corresponding to the longest fan-out signal lines of an integrated circuit have substantially longer equivalent channel widths than those of the other ESD protection devices or substantially smaller impedances than those of the other ESD protection devices.

Another object of the invention is to provide a mechanism for preventing ESD damage in an electronic device, such as an LCD panel. The ESD protection devices corresponding to the outermost sides of the connection area have the substantially smallest impedance and impedances of the other ESD protection devices gradually increase from the outermost sides of the connection area to the substantially center thereof, thereby discharging the electrostatic charge efficiently.

Another object of the invention is to provide a mechanism for preventing ESD damage in an electronic device, such as an LCD panel. Any ESD protection device corresponding to one fan-out signal line of an integrated circuit has an impedance substantially different from impedances of the other ESD protection devices, thereby discharging the electrostatic charge efficiently.

Another object of the invention is to provide an liquid crystal display panel utilizing the above mechanism for preventing ESD damages, thereby preventing the LCD panel from damaged by ESD.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 is a schematic diagram of signal lines of a conventional liquid crystal display (LCD) panel.

FIG. 2 shows an example of an ESD protection device composed by a diode circuit.

FIG. 3 shows layout of the diode circuit in FIG. 2 .

FIG. 4 shows an embodiment of a mechanism for preventing ESD damages in the present invention.

FIG. 5 shows another embodiment of a mechanism for preventing ESD damage in the present invention.

A diode circuit is always applied to an electronic device to serve as an electrostatic discharge (ESD) protection device. The ESD protection device ES 1 shown in FIG. 2 comprises six diodes D 1 to D 6 configured corresponding to the fan-out signal line F 1 in FIG. 1 . Generally, two ESD protection devices ES 1 are respectively configured at two terminals of the pad P 1 , but only one is shown in FIG. 2 .

The diodes D 1 to D 6 within the ESD protection devices ES 1 usually are typically composed by elements having MOS transistor circuit structures, such as a MOS transistor whose drain is coupled to its gate. FIG. 3 shows a circuit layout of diodes D 1 to D 6 in FIG. 2 . As shown in FIG. 3 , channel widths of the diodes D 1 to D 3 are CH 1 while channel widths of the diodes D 4 to D 6 are CH 2 . An impedance of the ESD protection device ES 1 is determined according to the channel widths CH 1 and CH 2 . That is, when an equivalent width composed of the channel widths CH 1 and CH 2 increases, the impedance of the ESD protection device ES 1 decreases.

FIG. 4 shows an embodiment of a mechanism for preventing ESD damage in the present invention. The mechanism is applied to an electronic device, LCD panel.

The LCD panel comprises a pixel array 12 , a plurality of connection areas 10 , a plurality of fan-out signal lines F 1 to F n , and a plurality of ESD protection devices ES 1 to ED n . Each connection area 10 has a plurality of pads P 1 to P n arranged sequentially for mounting to one integrated circuit. The pads P 1 to P n are disposed on two outermost sides of the connection area 10 . The fan-out signal lines F 1 to F n extend from the pads P 1 to P n respectively. The ESD protection devices ES 1 to ED n are disposed corresponding to the fan-out signal lines F 1 to F n . In addition, each ESD protection device comprises a least one element having a MOS transistor circuit structure, such as a MOS transistor whose drain is coupled to its gate.

As shown in FIG. 4 , impedances of the ESD protection devices ES 1 and ED n are designed to be substantially smaller than impedances of ESD protection devices ES 2 and ED n−1 . That is, an equivalent channel width L 1 of the ESD protection devices ES 1 and ED n is designed to be substantially longer than an equivalent channel width L 2 of ESD protection devices ES 2 and ED n−1 .

According to the embodiment, in one connection area 10 , the equivalent of the ESD protection devices ES 1 and ED n are substantially small, that is the equivalent channel width L 1 of the ESD protection devices ES 1 and ED n is substantially longest. Therefore, accumulated electrostatic charges on the substantially longest fan-out signal lines F 1 and F n which do not easily disperse charges could be effectively dispersed through the ESD protection devices ES 1 and ED n , preventing the LCD panel from ESD damage.

FIG. 5 shows another embodiment of a mechanism for preventing ESD damages in the present invention. The mechanism is applied to an electronic device, an LCD panel.

The LCD panel comprises a pixel array 12 , a plurality of connection areas 10 , a plurality of fan-out signal lines F 1 to F n , and a plurality of ESD protection devices ES 1 to ED n . Each connection area 10 has a plurality of pads P 1 to P n arranged sequentially for mounting to one integrated circuit. The pads P 1 to P n are disposed on two outermost sides of the connection area 10 . The fan-out signal lines F 1 to F n extend from the pads P 1 to P n respectively. The ESD protection devices ES 1 to ED n are disposed corresponding to the fan-out signal lines F 1 to F n . In addition, each ESD protection device comprises a least one element having a MOS transistor circuit structure, such as a MOS transistor whose drain is coupled to its gate.

As shown in FIG. 5 , in one connection area 10 , impedances of the ESD protection devices ES 1 to ED n gradually increase from the ESD protection devices ES 1 and ED n to the substantially center of the connection area 10 . That is, equivalent channel widths of the ESD protection devices ES 1 to ED j gradually decrease and equivalent channel widths of the ESD protection devices ES j+1 to ED n sequentially increase gradually.

According to the gradual decrease in the lengths of the fan-out signal lines from the two outermost sides of the connection area 10 to the substantially center thereof, the impedances of the ESD protection devices are designed to gradually increase. That is, the equivalent channel widths of the ESD protection devices gradually decrease from the two outermost sides of the connection area 10 to the substantially center thereof. Therefore, electrostatic charges could be effectively dispersed through the ESD protection devices ES 1 and ED n , preventing the LCD panel from ESD damaged.

The embodiment is a mechanism for preventing ESD damages of the present invention applied to an electronic device. Among all ESD protection devices ES 1 and ED n , an impedance of one ESD protection device ES k (1≦k≦n) is substantially different from these of the others. Each ESD protection device comprises at last one element having a MOS transistor circuit structure. Therefore, an equivalent channel width of the ESD protection device ES k is substantially different these of other protection devices.

While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.