Multilayer capacitor

The present invention relates to a multilayer capacitor capable of greatly reducing the effective inductance, more particularly relates to a multilayer ceramic capacitor capable of reducing the voltage fluctuations of a CPU power source.

In recent years, CPUs (central processing units) used for data processing apparatuses have become higher in operating frequency and remarkably increased in current consumption due to the improvement in processing speeds and higher integration. Along with this, there is a trend toward reduction of the power consumption so as to reduce the operating voltage. Therefore, in power sources for supplying power to CPUs, faster and larger current fluctuations occur. It has become extremely difficult to keep voltage fluctuations accompanying current fluctuations to within tolerances of the power sources.

Therefore, as shown in FIG. 12 , a multilayer capacitor 100 called a “decoupling capacitor” is connected to a power source 102 and frequently used for stabilization of the power source. Further, by fast charging and discharging at the time of high speed, transient fluctuations in current, the multilayer capacitor 100 supplies current to the CPU 104 and suppresses voltage fluctuations in the power source 102 .

Conventional multilayer capacitors are disclosed in for example Japanese Patent Unexamined Publication No. 2002-164256, Japanese Patent Unexamined Publication No. 2002-151349, Japanese Patent Unexamined Publication No. 2000-323354, Japanese Patent Unexamined Publication No. 11-144996, Japanese Patent Unexamined Publication No. 08-097070, and Japanese Patent Unexamined Publication No. 06-140283.

Along with the increasingly higher operating frequencies of today's CPUs, however, the current fluctuations have become faster and larger. Therefore, the equivalent serial inductance (ESL) of the multilayer capacitor 100 itself shown in FIG. 12 becomes relatively larger. Along with this, the effective inductance becomes larger. As a result, the equivalent serial inductance greatly influences voltage fluctuations of the power source.

That is, in a conventional multilayer capacitor used for the power source circuit of the CPU 104 shown in FIG. 12 , since the ESL of the parasitic part shown in the equivalent circuit of FIG. 12 is high, along with fluctuations of the current I shown in FIG. 13 , the ESL inhibits the charging and discharging of the multilayer capacitor 100 . Therefore, in the same way as the above, the fluctuations in the voltage V of the power source easily become greater as shown in FIG. 13 . Therefore, it will become impossible to handle the increasingly higher speeds of CPUs in the future.

This is because the voltage fluctuations at the time of transition of the current are approximated by the following equation 1 and therefore the level of the ESL is related to the magnitude of fluctuation of the power source voltage:

dV=ESL·di/dt   formula (1)

Here, dV is transitory fluctuation of voltage (V), “i” is the amount of current fluctuation (A), and “t” is the time of fluctuation (sec).

Here, the appearance of this conventional capacitor is shown in FIG. 14 , while the internal structure is shown in FIG. 15 . Below, a conventional multilayer capacitor 100 will be explained based on these figures. That is, the conventional multilayer capacitor 100 shown in FIG. 14 is structured to give an electrostatic capacity by alternately stacking pairs of ceramic layers 112 A each provided with two types of internal conductors 114 and 116 shown in FIG. 15 and forming a dielectric body 112 .

Further, these two types of internal conductors 114 and 116 are led out to alternately facing two side surfaces 112 B and 112 C. Further, the terminal electrode 118 connected to the internal conductors 114 and the terminal electrode 120 connected to the internal conductors 116 are set at the alternately facing side surfaces 112 B and 112 C of the multilayer capacitor 100 shown in FIG. 14 .

As shown in FIG. 16 , the multilayer capacitor 100 is mounted with the ceramic layers 112 A stacked along the perpendicular direction (Z-direction) with respect to the surface of a multilayer board 122 , so the surfaces of the internal conductors 114 and 116 become horizontal with respect to the surface of the multilayer board 122 . Therefore, the distance from the land patterns 124 of the conductor parts of the multilayer board 122 to the internal conductors 114 and 116 in the dielectric body 112 becomes longer and the area occupied by the current loop E becomes larger. As a result, in the conventional structure, there is the defect that the total inductance increases and along with this the effective inductance also ends up increasing.

In this way, as factors causing an increase in the voltage fluctuations of the power source, there are not only the ESL of the capacitor itself, but also the total inductance. The sum of the ESL and the total inductance has a great effect on the voltage fluctuations of the power source as the effective inductance. Therefore, it is necessary to reduce this effective inductance.

On the other hand, the structure shown in FIG. 17 may be considered as a mounting structure for avoiding an increase in the total inductance. In the mounting structure shown in the figure, the stacking direction of the internal conductors is made 90 degrees different from the structure shown in FIG. 16 and the ceramic layers 112 A are stacked in the Y-direction along the surface of the multilayer board 122 .

That is, the surfaces of the internal conductors 114 and 116 are perpendicular to the surface of the multilayer board 122 on which the multilayer capacitor 100 is mounted. Along with this, the current loop E becomes shorter. As a result, the total inductance is reduced.

However, no matter which structure is used, in the past, the total inductance could not be sufficiently reduced and it was not possible to eliminate the defect of the large effective inductance.

The present invention has as its object the provision of a multilayer capacitor capable of greatly reducing the effective inductance and reducing the voltage fluctuations in the CPU power source.

To achieve this object, the multilayer capacitor according to the present invention is a multilayer capacitor having a dielectric layer and two types of, that is, first and second, internal conductor layers insulated from each other by a dielectric layer and alternately arranged in a dielectric body, the multilayer capacitor characterized in that the first internal conductor layer is formed with at least one first cut part, the second internal conductor layer is formed with at least one second cut part, and, due to the cut parts, each internal conductor layer is formed with at least two channel parts connected at an uncut end in the same plane and channel parts adjoining each other in the same plane carry current flowing in reverse directions.

In the multilayer capacitor according to the present invention, when powering up the multilayer capacitor, the direction of flow of the current becomes reverse between the channel parts positioned across the cut part in the same internal conductor. Along with this, the magnetic fluxes generated by the high frequency current flowing through the internal conductor layer are canceled out by each other, the parasitic capacity of the multilayer capacitor itself becomes smaller, and the equivalent serial inductance (ESL) is reduced. Therefore, in the multilayer capacitor according to the present invention, the loop inductance is reduced, a reduction in the ESL is achieved, and the effective inductance is greatly reduced. As a result, in the present invention, oscillation of voltage of the power source can be reliably suppressed and a multilayer capacitor optimal for use as a CPU power source is obtained. Further, since the lengths of the channels become larger due to the cut part, the equivalent serial resistance (ESR) becomes larger and the balance between the ESR and ESL becomes better.

Preferably, the first conductor layer is formed with a first lead part and the second conductor layer is formed with a second lead part at a position different from the first lead part so that current flows in reverse directions between the channel parts formed at the first and second internal conductor layers adjoining each other across the dielectric layer.

In this case, current flows in reverse directions even at corresponding channels adjoining each other across the dielectric layer. Along with this, the magnetic fluxes generated by the high frequency current flowing through the internal conductor are canceled out by each other and the ESL can be reduced.

Preferably, the lead parts are formed so as to be led out to only one surface of the dielectric body.

More preferably, the one surface of the dielectric body where the lead parts are led out to is formed with a first terminal electrode connected to the first lead parts and a second terminal electrode insulated so as not to be directly connected with the first terminal electrode and connected to the second lead parts.

More preferably, the dielectric body is a rectangular parallelepiped, a length of a side of the dielectric body running along the stacking direction of the dielectric layers is made longer than a length of any other two sides running along a direction intersecting the side running along the stacking direction, and said one surface of the dielectric body is formed with the first terminal electrode and second terminal electrode.

More preferably, said one surface of the dielectric body is formed with the first terminal electrode and second terminal electrode so as to extend along the stacking direction substantially in parallel at a predetermined interval.

By leading out lead parts to only one surface of the dielectric body (preferably the bottom surface), when mounting the multilayer capacitor on the board, mounting of the multilayer capacitor, in case that the stacking direction of the dielectric layers extends along the surface of the board, becomes easier. That is, it becomes easier to structure the capacitor so that the surfaces of the internal conductor layers are perpendicular to the surface of the board on which the multilayer capacitor is mounted. Further, along with this, the current loop becomes shorter and as a result the loop inductance is reduced.

Further, by forming the first terminal electrode and second terminal electrode on one surface of the dielectric body (preferably the bottom surface), it is possible to reduce to the minimum necessary extent the solder for connecting these electrodes to the interconnect layer of the board and possible to suppress to a minimum the effects of thermal distortion.

Preferably, the first lead part is formed near one first end in the longitudinal direction of the dielectric layer, and the second lead part is formed near another second end in the longitudinal direction of the dielectric layer. By configuring the capacitor in this way, it becomes easy to lead the lead parts out to only one surface of the dielectric body (preferably the bottom surface).

Preferably, the first and second cut parts for forming the channel parts in first and second internal conductor layers adjoining each other across the dielectric layer are formed at substantially the same positions between the internal conductor layers adjoining each other. By configuring the capacitor in this way, it becomes easier to make the directions of current flowing through the channel parts formed at the first and second internal conductor layers adjoining each other across the dielectric layer reverse directions.

Preferably, a starting point of the first cut part formed in the first internal conductor layer starts from near the first lead part of the first internal conductor layer, a starting point of the second cut part formed in the second internal conductor layer starts from near the second lead part of the second internal conductor layer, and these cut parts are formed at substantially the same positions at adjoining internal conductor layers. By configuring the capacitor in this way, it becomes easier to make the directions of current flowing through the channel parts formed at the first and second internal conductor layer adjoining each other across the dielectric layer reverse directions.

Preferably, the first cut part formed at the first internal conductor layer is substantially L-shaped, the second cut part formed at the second internal conductor layer is a linear shape running through a substantial center of the dielectric layer along a longitudinal direction of the dielectric layer, and the first cut part and the second cut part are formed at substantially the same positions across the dielectric layer. By configuring the capacitor in this way, it becomes easier to make the directions of current flowing through the channel parts formed at the first and second internal conductor layers adjoining each other across the dielectric layer reverse directions.

Preferably, the first internal conductor layer is formed with a plurality of first cut parts, the second internal conductor layer is formed with a plurality of second cut parts at positions corresponding to the first cut parts, and uncut ends of corresponding cut parts across the dielectric layer are formed at opposite sides along the longitudinal direction of the cut parts. By configuring the capacitor in this way, the number of channels through which current flows in reverse directions in the same plane in one internal conductor layer increases. Further, it becomes easier to make the directions of current flowing through the channel parts formed at the first and second internal conductor layers adjoining each other across the dielectric layer reverse directions.

Preferably, one of the channel parts formed by the first cut part is extended to form a first lead part and one of the channel parts formed by the second cut part is extended to form a second lead part. By configuring the capacitor in this way, the flow of current from the lead parts to the channel parts becomes smoother.

In the present invention, the first lead part may be led out to a first side surface of the dielectric body, and the second lead part may be led out to another second side surface of the dielectric body facing the first side surface.

In this case, the first side surface is preferably formed with a first terminal electrode connected to lead parts of the first internal conductor layers, and

the second side surface is preferably formed with a second terminal electrode connected to lead parts of the second internal conductor layers.

In this case, the dielectric body is a rectangular parallelepiped, the length of a side of the dielectric body running along the stacking direction of the dielectric layers is made longer than the length of any other two sides running along a direction intersecting the side running along the stacking direction, and opposite side surfaces of the dielectric body are formed with the first terminal electrode and second terminal electrode.

In the present invention, from the point for reducing the loop inductance as a result of the shorter distance between terminal electrodes, it is most preferable to lead the lead parts out to just one surface (preferably the bottom surface). However, in the present invention, it is also possible to lead the lead parts out toward opposite side surfaces of the dielectric body and form terminal electrodes at those opposite side surfaces.

Preferably, the first and second cut parts are formed running through a center part of each internal conductor layer along a longitudinal direction of each internal conductor layer and the uncut ends of the cut parts are arranged alternately opposite from each other via the dielectric layer. By configuring the capacitor in this way, it becomes easier to make the directions of current flowing through the channel parts formed at first and second internal conductor layers adjoining each other via the dielectric layer reverse directions.

Preferably, the width of the channel parts and the width of the second lead part are substantially the same. By configuring the capacitor in this way, the flow of current from the lead part to the channel parts becomes smoother.

Alternatively, the width of the first and second lead parts may be made larger than the width of the channel parts. By making the width of the lead parts larger, connection between the terminal electrodes formed at the outside of the dielectric body and the lead parts becomes more reliable.

In the present invention, the first and second cut parts may be formed in the internal conductor layers to be alternately opposite in substantially perpendicular direction with respect to the longitudinal direction of the dielectric layer.

Alternatively, the first and second cut parts may be formed in the internal conductor layers to be alternately opposite in longitudinal direction of the dielectric layer. Alternatively, the first and second cut parts may be formed in the internal conductor layers to be alternately opposite in direction of inclination with respect to the longitudinal direction of the dielectric layer.

By forming a plurality of cut parts in one internal conductor layer, the number of the channels through which the current flows in reverse directions in the same plane in the internal conductor layer increases. Further, it becomes easy to make the direction of the current flowing through the channel parts formed at first and second internal conductor layers adjoining each other across a dielectric layer reverse directions.

In the present invention, preferably the width of the uncut ends is equal to the width of the channels. If the width of an uncut end is too narrow compared with the width of the channels, the electrical resistance at that part will tend to become larger.

In the present invention, preferably the width of the cut parts is 100 to 200 μm. If the width of the cut part is too narrow, maintaining the insulation property will tend to become difficult, while if the width is too wide, the electrode area in the limited space will be reduced, so the electrostatic capacity of the capacitor will tend to become smaller.

The present invention will be explained in detail based on the embodiments shown in the drawings.

FIG. 1 is a perspective view of a multilayer capacitor according to a first embodiment of the present invention;

FIG. 2 is a disassembled perspective view of the multilayer capacitor shown in FIG. 1 and shows the parts of the two types of internal conductors;

FIG. 3 is a sectional view of the mounting structure of a multilayer capacitor shown in FIG. 1 ;

FIG. 4 is a plan view of parts of the two types of internal conductors of the multilayer capacitor according to a second embodiment of the present invention;

FIG. 5 is a plan view of parts of the two types of internal conductors of the multilayer capacitor according to a third embodiment of the present invention;

FIG. 6 is a perspective view of a multilayer capacitor according to a fourth embodiment of the present invention;

FIG. 7 is a plan view of parts of the two types of internal conductors of the multilayer capacitor shown in FIG. 6 ;

FIG. 8 is a plan view of parts of the two types of internal conductors of the multilayer capacitor according to a fifth embodiment of the present invention;

FIG. 9 is a plan view of parts of the two types of internal conductors of the multilayer capacitor according to a sixth embodiment of the present invention;

FIG. 10 is a plan view of parts of the two types of internal conductors of the multilayer capacitor according to a seventh embodiment of the present invention;

FIG. 11 is a graph of the attenuation characteristics of different samples;

FIG. 12 is a diagram of a circuit employing the multilayer capacitor;

FIG. 13 is a graph of the relationship between current fluctuation and voltage fluctuation in a circuit employing a multilayer capacitor of the related art;

FIG. 14 is a perspective view of parts of internal conductors of a multilayer capacitor shown in FIG. 14 ;

FIG. 15 is a disassembled perspective view of parts of internal conductors of the multilayer capacitor shown in FIG. 14 ;

FIG. 16 is a sectional view of a first mounting structure of a multilayer capacitor according to the related art; and

FIG. 17 is a sectional view of a second mounting structure of a multilayer capacitor according to the related art.

First Embodiment

First, the multilayer capacitor according to a first embodiment of the present invention will be explained. The multilayer ceramic capacitor serving as the multilayer capacitor according to the present invention (hereinafter simply referred to as a “multilayer capacitor”) 10 according to the present embodiment is shown in FIG. 1 to FIG. 3 . As shown in these figures, the multilayer capacitor 10 is comprised of, as a main part, a dielectric body 12 comprised of a rectangular parallelepiped shaped sintered body obtained by sintering a stack of a plurality of ceramic green sheets comprising dielectric sheets.

A planar shaped internal conductor layer (first internal conductor layer) 14 is arranged at a predetermined position inside the dielectric body 12 . A similar planar shaped internal conductor layer (second internal conductor layer) 16 is arranged inside the dielectric body 12 at farer side in the stacking direction Y than the internal conductor layer 14 separated by the ceramic layer 12 A used as the dielectric layer. These internal conductor layer 14 and internal conductor layer 16 are arranged in the dielectric body. 12 facing each other separated by the ceramic layer (dielectric layer) 12 A.

In the present embodiment, the internal conductor layer 14 and internal conductor layer 16 are arranged in that order in the dielectric body with the ceramic layer 12 A comprised of a sintered dielectric sheet sandwiched between them. At the far side of the internal conductor layer 16 in the stacking direction Y, as shown in FIG. 1 , these two electrodes are repeated in the same order. A total of for example 10 of these sets are arranged.

Further, the centers of these internal conductor layers 14 and internal conductor layers 16 are arranged at substantially the same positions as the center of the dielectric body 12 . Further, the vertical and horizontal dimensions of the internal conductor layers 14 and internal conductor layers 16 are made smaller than the lengths of the corresponding sides of the dielectric body 12 . Further, as the materials of the internal conductors 14 and 16 formed in substantially rectangular shapes, not only may base metal materials such as nickel, nickel alloys, copper, or copper alloys be considered, but also materials mainly comprised of these metals may be considered.

On the other hand, the length W of the side of the dielectric body 12 running along the stacking direction Y of the ceramic layers 12 A is made longer than the lengths L and T of any other two sides running along the direction X or Z intersecting the side running along the stacking direction Y. That is, the length W of the side running along the stacking direction 9 is not only made longer than the X-direction length L, but also is made longer than the Z-direction length T. Note that in FIG. 1 and FIG. 2 , the stacking direction is made the Y-direction, the vertical direction is made the Z-direction, and the horizontal direction orthogonal to the Y-direction and Z-direction is made the X-direction.

As shown in FIG. 1 and FIG. 2 , a single lead part (first lead part) 14 A is formed led out from the end at the left side of the longitudinal direction (X-direction) of an internal conductor layer 14 toward the downward direction. Further, a single lead part (second lead part) 16 A is formed led out from the end at the right side of the longitudinal direction (X-direction) of an internal conductor layer 16 toward the downward direction. That is, the lead part 14 A and lead part 16 A are led out from the two ends of the internal conductor layers 14 and 16 in the X-direction in a not overlapping different positional relationship toward only the bottom surface (bottom surface) 12 B of FIG. 1 .

Further, as shown in FIG. 1 , the terminal electrode (first terminal electrode) 24 connected to the lead parts 14 A of the internal conductor layers 14 and the terminal electrode (second terminal electrode) 26 connected to the lead parts 16 A of the internal conductor layers 16 are arranged at the bottom surface 12 B of the dielectric body 12 in the Z-direction. Therefore, the adjoining terminal electrodes are connected to different internal conductor layers 14 and 16 through the lead parts 14 A and 16 A. These terminal electrodes 24 and 26 are arranged insulated from each other at the bottom surface 12 B of the dielectric body 12 . These adjoining terminal electrodes can be used at opposite polarities from each other.

In the present embodiment, the bottom surface 12 B of the multilayer capacitor 10 has the terminal electrodes 24 and 26 arranged at it. Therefore, one of the side surfaces 12 B in the four side surfaces 12 B and 12 C of the dielectric body 12 made the rectangular parallelepiped, that is, a hexagonal shape, has the terminal electrodes 24 and 26 arranged at it. Further, these terminal electrodes 24 and 26 are formed at the bottom surface 12 B of the dielectric body 12 extending across a predetermined interval substantially in parallel in the stacking direction Y.

Further, in the present embodiment, the terminal electrode 24 is for example connected to the electrodes of the CPU so that the internal conductor layers 14 and 16 become the electrodes of the capacitor. Further, the terminal electrode 26 is for example connected to the grounded side. These adjoining terminal electrodes can be used at opposite polarities from each other.

Specifically, the multilayer capacitor 10 is soldered to the multilayer board 122 shown in FIG. 3 , whereby the land patterns 124 of the multilayer board 122 and the terminal electrodes 24 and 26 are connected.

In the present embodiment, an internal conductor layer 14 is formed with a cut part (first cut part) 18 a . The cut part 18 a formed at the internal conductor layer 14 is substantially L-shaped and has a vertical cut starting at the right side of the lead part 14 A and extending in the upward direction Z and a horizontal cut connected with the vertical cut and extending through the center part of the internal conductor layer 14 in the horizontal direction X on a straight line.

Further, an internal conductor layer 16 is formed with a cut part (second cut part) 18 b extending in the horizontal direction on a straight line from the middle of the right end side of the internal conductor layer 16 . The starting point of the cut part 18 b is near the lead part 16 A of the internal conductor layer 16 . The main part (horizontal cut) of the cut part 18 a and the main part (horizontal cut) of the cut part 18 b are formed at substantially the same positions with each other. However, the uncut ends 19 of the cut parts 18 a and 18 b are positioned opposite in the X-direction at adjoining internal conductor layers.

By an internal conductor layer 14 being formed with a cut part 18 a , a pair of channel parts 20 A and 20 B is formed across the cut part 18 a . Further, by an internal conductor layer 16 being formed with a cut part 18 b , a pair of channel parts 22 A and 22 B is formed across the cut part 18 b . Further, the ends of the pair of channel parts 20 A and 20 B are connected through the uncut end 19 of the cut part 18 a , so current flows in reverse directions at the pair of channels 20 A and 20 B positioned across the cut part 18 a . Further, similarly, the ends of the pair of channel parts 22 A and 22 B are connected through the uncut end 19 of the cut part 18 b , so current flows in reverse directions between them.

For example, when an internal conductor layer 14 becomes a + polarity and simultaneously an internal conductor layer 16 becomes a − polarity, as shown by the direction of the current shown by the arrow marks in FIG. 2 , the current flows toward the right side at the channel part 20 A of the internal conductor layer 14 , and the current flows toward the left side at the channel part 20 B. Further, the current flows toward the left side at the channel part 22 A of the internal conductor layer 16 , and the current flows toward the right side at the channel part 22 B.

Therefore, current flows in reverse directions between the channel part 20 A and channel part 22 A of the internal conductor layers 14 and 16 and between the channel part 20 B and channel part 22 B adjoining each other across a ceramic layer 12 A. The pair of channel parts 20 A and 20 B and the pair of channels 22 A and 22 B are arranged at the internal conductor layers 14 and 16 so that the current flows in this relationship.

Note that the width of the cut parts 18 a and 18 b is not particularly limited, but preferably is 100 to 200 μm. If the width of the cut parts 18 a and 18 b is too narrow, the insulation property is liable not to be maintained, while if too wide, the widths of the channel parts 20 A, 20 B, 22 A, and 22 B tend to become narrower. The width of the channel parts 20 A, 20 B, 22 A, and 22 B is preferably 400 to 600 μm. If the width of the channel parts is too narrow, the resistance tends to become too high, while if the width is too wide, achievement of a compact capacitor tends to become difficult.

The lead part 14 A of an internal conductor layer 14 is formed extended from the channel part 20 A. The width of the lead part 14 A is about the same as the widths of the channel parts 20 A and 20 B. Further, the width of the uncut part 19 is also about the same as the width of the channel parts 20 A and 20 B.

Next, the action of the multilayer capacitor 10 according to the present embodiment will be explained. According to the multilayer capacitor 10 according to the present embodiment, two types of internal conductor layers 14 and 16 are arranged in a manner between ceramic layers 12 A in the dielectric body 12 formed in a rectangular parallelepiped by stacking a plurality of dielectric sheets forming ceramic layers 12 A. Therefore, these two types of internal conductor layers 14 and 16 are made capacitor electrodes arranged facing each other in parallel.

Further, the two types of internal conductor layers 14 and 16 have the lead parts 14 A and 16 A led out toward the same side surface 12 B of the dielectric body 12 . Terminal electrodes 24 and 26 connected to any of the two types of internal conductor layers 14 and 16 through these lead parts 14 A and 16 A are set at the same side surface 12 B of the dielectric body 12 . Further, the length W of the side of the dielectric body 12 running along the stacking direction (Y-direction of FIG. 1 ) of the ceramic layers 12 A is made longer than the lengths L and T of any other two sides of the dielectric body 12 running along the direction intersecting the side running along the stacking direction.

Therefore, when mounting the multilayer capacitor 10 of the present embodiment on the multilayer board 122 shown in FIG. 3 , it becomes easy to mount the multilayer capacitor 10 by stacking the ceramic layers 12 A along the surface of the multilayer board 122 . That is, in the present embodiment, the surfaces of the internal conductor layers 14 and 16 are perpendicular to the surface of the multilayer board 122 on which the multilayer capacitor 10 is mounted. Along with this, the current loop becomes shorter and as a result the loop inductance is reduced.

Further, in the present embodiment, these two types of internal conductor layers 14 and 16 have cut parts 18 . The parts of the internal conductor layers 14 straddling the cut parts 18 a form the channel parts 20 A and 20 B. Further, the parts of the internal conductor layers 16 straddling the cut parts 18 b form the channel parts 22 A and 22 B. These channel parts 20 A, 20 B, 22 A, and 22 B are arranged so that current flows in reverse directions with the channels of other internal conductor layers 14 and 16 adjoining each other across a ceramic layer 12 A.

Therefore, when powering up the multilayer capacitor 10 , current flows in reverse directions between channel parts of the internal conductor layers 14 and 16 adjoining each other across a ceramic layer 12 A. Along with this, the magnetic fluxes generated by the high frequency current flowing through the internal conductor layers 14 and 16 are canceled out. By reducing the parasitic inductance of the multilayer capacitor 10 itself, the equivalent serial inductance is reduced.

Further, even in the same internal conductor layers 14 and 16 , the direction of flow of current becomes reverse between the channel part 20 A and channel part 20 B and between the channel part 22 A and channel part 22 B positioned across the cut part 18 .

Due to this, the multilayer capacitor 10 according to the present embodiment is reduced in loop inductance, achieves a greater reduction of the ESL, and is greatly reduced in the effective inductance. As a result, according to the present embodiment, it is possible to reliably suppress oscillation of the voltage of the power source, whereby the multilayer capacitor 10 becomes optimal for the power source of a CPU.

Further, the side surface 12 B facing the multilayer board 11 on which the multilayer capacitor 10 is mounted has two types of internal conductor layers 14 and 16 led out from it and has terminal electrodes 24 and 26 arranged at it. Therefore, the distance between these terminal electrodes 24 and 26 is shortened and, as a result, the loop inductance is reduced more.

On the other hand, in the present embodiment, pluralities of two types of internal conductors are arranged in the dielectric body 12 , so not only does the electrostatic capacity of the multilayer capacitor 10 become higher, but also the action of cancellation of the magnetic fields becomes further greater, the inductance is more greatly reduced, and the ESL is more greatly reduced.

Further, the internal conductor layers 14 and 16 are formed with cut parts 18 A and 18 B. The path of the current resulting from the channels 20 A, 20 B, and 20 C become relatively longer, so the equivalent serial resistance (ESR) can be made larger. Therefore, the balance between the ESR and ESL becomes better.

Second Embodiment

Next, a multilayer capacitor of a second embodiment of the present invention will be explained based on FIG. 4 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The multilayer capacitor of the present embodiment is structured substantially the same as the multilayer capacitor of the first embodiment. However, in the present embodiment, as shown in FIG. 4 , two cuts 18 c and 18 d are formed from the bottom side and top side in an internal conductor layer 14 in parallel and in an inclined direction (with respect to X-axis and Y-axis) in the internal conductor layer 14 . Further, an internal conductor layer 16 is formed with two cuts 18 e and 18 f in parallel and in an inclined direction in a substantially reverse positional relationship from the internal conductor layer 14 .

As a result, an internal conductor layer 14 is formed with three channel parts 20 A, 20 B, and 20 C across the cut parts 18 c and 18 d , while an internal conductor layer 16 is formed with three channel parts 22 A, 22 B, and 22 C across the cut parts 18 e and 18 f . Further, the ends of the three channel parts 20 A, 20 B, and 20 C are alternately connected through the uncut ends 19 . Therefore, the three channel parts 20 A, 20 B, and 20 C of an internal conductor layer 14 positioned across the cut parts 18 carry current flowing in reverse directions at the adjoining channel parts. Further, ends of the three channel parts 22 A, 22 B, and 22 C are alternately connected through the uncut ends 19 . Therefore, the three channel parts 22 A, 22 B, and 22 C of an internal conductor layer 16 positioned across the cut parts 18 carry current flowing in reverse directions at the adjoining channel parts.

Further, the main parts of the cut parts 18 c , 18 d , 18 e , and 18 f are positioned alternately at the same locations and the uncut ends 19 are positioned in opposite directions at the internal conductor layers positioned adjoining them at the two sides across a ceramic layer 12 A.

Therefore, when for example an internal conductor layer 14 becomes a + polarity and simultaneously an internal conductor layer 16 becomes a − polarity, as shown by the direction of the current shown by the arrow marks in FIG. 4 , the current flows toward the top right side at the channel part 20 A of the internal conductor layer 14 , the current flows toward the bottom left side at the channel part 20 B, and the current flows toward the top right side at the channel part 20 C. Further, the current flows toward the bottom left side at the channel part 22 A of the internal conductor layer 16 , the current flows toward the top right side at the channel part 22 B, and the current flows toward the bottom left side at the channel part 22 C.

Accordingly, current flows in reverse directions between the channel part 20 A and channel part 22 A of the internal conductor layers 14 and 16 adjoining each other across a ceramic layer 12 A, between the channel part 20 B and channel part 22 B, and between the channel part 20 C and channel part 22 C. An internal conductor layer 14 has three channel parts 20 A, 20 B, and 20 C arranged at it, while an internal conductor layer 16 has three channel parts 22 A, 22 B, and 22 C arranged at it so as to give this direction of current.

Therefore, in the present embodiment, in the same way as the first embodiment, the loop inductance is reduced, further reduction of the ESL is achieved, and the effective inductance is greatly reduced. Further, the internal conductor layers 14 and 16 are provided with a plurality of cut parts 18 , so the total length of the channel parts through which current can flow becomes longer and the effect of reduction of the equivalent serial inductance is further increased.

Third Embodiment

Next, a multilayer capacitor of a third embodiment of the present invention will be explained based on FIG. 5 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The capacitor of the present embodiment is also structured substantially the same as the capacitor of the first embodiment. However, in the present embodiment, the two cuts 18 g and 18 h are formed from the bottom side and top side of an internal conductor layer 14 in FIG. 5 in parallel and in the vertical direction (with respect to Z-direction) in the internal conductor layer 14 . Further, an internal conductor layer 16 is formed with two cuts 18 i and 18 j in parallel with each other in the vertical direction in a positional relationship substantially opposite to the internal conductor layer 14 .

That is, while the cut directions differ, in the same way as the second embodiment, two cut parts 18 g to 18 j are formed at an internal conductor layer 14 and internal conductor layer 16 . Therefore, the present embodiment acts in the same way as the second embodiment and gives not only the effects obtained in the first embodiment, but also the effect of further reduction of the equivalent serial inductance due to the longer total length of the channels through which the current can flow.

Fourth Embodiment

Next, a multilayer capacitor of a fourth embodiment of the present invention will be explained based on FIG. 6 and FIG. 7 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The capacitor of the present embodiment is structured in substantially the same way as the capacitor of the first embodiment. However, in the present embodiment, as shown in FIG. 6 and FIG. 7 , a lead part 14 B is led out at a width of about half of an internal conductor layer 14 from the part of the internal conductor layer 14 near the top side of the left surface toward the left side surface (first side surface) 12 C of the dielectric body 12 . Further, a lead part 16 B is led out at a width of about half of an internal conductor layer 16 (width of channel) from the part of the internal conductor layer 16 near the bottom side of the right surface toward the right side surface (second side surface) 12 C of the dielectric body 12 .

That is, the two types of internal conductor layers 14 and 16 have the lead parts 14 B and 16 B led out toward the two facing side surfaces 12 C in the X-direction at the dielectric body 12 . As shown in FIG. 6 , the left side surface 12 C among the two facing side surfaces 12 C has the terminal electrode (first terminal electrode) 34 connected to the internal conductor layers 14 through the lead parts 14 B arranged at it. Further, the right side surface 12 C has the terminal electrode (second terminal electrode) 36 connected to the internal conductor layers 16 through the lead parts 16 B arranged at it.

Further, a cut 18 k extending in the X-direction horizontal direction from the bottom side of each lead part 14 B is formed in an internal conductor layer 14 , while a cut 18 l extending in the X-direction horizontal direction from the top side of each lead part 16 B is formed in an internal conductor layer 16 .

An internal conductor layer 14 is divided into the pair of channel parts 20 A and 20 B across the cut part 18 k , while an internal conductor layer 16 is divided into the pair of channel parts 22 A and 22 B across the cut part 18 l . However, the pair of channels 20 A and 20 B is connected at the uncut end 19 at the opposite side to the lead part 14 B or 16 B. Current flows in reverse directions at the pair of channel parts 20 A and 20 B. Note that the uncut ends 19 are arranged at different locations across the ceramic layer 12 A.

Therefore, when for example an internal conductor layer 14 becomes a + polarity and simultaneously an internal conductor layer 16 becomes a − polarity, as shown by the direction of the current shown by the arrow marks in FIG. 7 , the current flows toward the right side at the channel part 20 A of the internal electrode layer 14 and the current flows toward the left side at the channel part 20 B. Further, the current flows toward the left side at the channel part 22 A of the internal conductor layer 16 , while the current flows toward the right side at the channel part 22 B.

Therefore, in the same way as the first embodiment, when powering up the multilayer capacitor 10 , the equivalent serial inductance is reduced by the current flowing in reverse directions at the channel parts of the internal conductor layers 14 and 16 adjoining each other across a ceramic layer 12 A.

Due to the above, the present embodiment, in the same way as the first embodiment, mounts the multilayer capacitor 10 so that the surfaces of the internal conductor layers 14 and 16 become perpendicular to the surface of the multilayer board 122 . Therefore, the current loop similarly becomes shorter, and the loop inductance is reduced in the same way as the first embodiment. However, in the present embodiment, unlike the first embodiment, the lead parts 14 B and 16 B are led out toward the two facing side surfaces 12 C of the dielectric body 12 . Further, the terminal electrodes 34 and 36 are provided at the two facing side surfaces 12 C of the dielectric body 12 .

Fifth Embodiment

Next, a multilayer capacitor of a fifth embodiment of the present invention will be explained based on FIG. 8 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The capacitor of the present embodiment is structured substantially the same way as the capacitor of the first embodiment. In the present embodiment, however, as shown in FIG. 8 , a lead part 14 C is led out at the entire width of an internal conductor layer 14 in the Z-direction from the internal conductor layer 14 toward the left side surface 12 C of the dielectric body 12 . Further, a lead part 16 C is led out at the entire width of the internal conductor layer 16 in the Z-direction from the internal conductor layer 16 toward the right side surface 12 C of the dielectric body 12 . That is, the two types of internal conductor layers 14 and 16 have lead parts 14 C and 16 C led out toward the two facing side surfaces 12 C of the dielectric body 12 . The widths of these lead parts 14 C and 16 C are about two times larger than the widths of the channels 20 A, 20 B, 22 A, and 22 B.

Further, while not shown, in the same way as the fourth embodiment, the left side surface 12 C has a terminal electrode 34 (see FIG. 6 ) connected to the internal conductor layers 14 through the lead parts 14 C arranged at it. Further, the right side surface 12 C has a terminal electrode 36 (see FIG. 6 ) connected to the internal conductor layers 16 through the lead parts 16 C arranged at it.

Further, cut parts 18 m and 18 n similar to the cut parts 18 k and 18 l of the fourth embodiment are provided at the internal conductor layers 14 and 16 . However, in the present embodiment, the part of the cut part 18 m close to the left side in an internal conductor layer 14 is bent downward and extends downward until the bottom end of the internal conductor layer 14 . Further, the part of the cut part 18 m close to the right side in the internal conductor layer 16 is bent upward and extends upward until the top end of the internal conductor layer 16 . These cut parts 18 m and 18 n are substantially L-shaped.

Therefore, in the present invention as well, in the same way as the fourth embodiment, an internal conductor layer 14 is divided into the pair of channels 20 A and 20 B across the cut part 18 m , while an internal conductor layer 16 is divided into the pair of channels 22 A and 22 B across the cut part 18 n . Due to the above, while there is the difference compared with the fourth embodiment in that the widths of the lead parts 14 C and 16 C are large, the present embodiment exhibits actions and effects similar to the fourth embodiment.

Sixth Embodiment

Next, a multilayer capacitor of a sixth embodiment of the present invention will be explained based on FIG. 9 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The capacitor of the present embodiment is also structured substantially the same as the capacitor of the first embodiment. However, in the present embodiment, as shown in FIG. 9 , a lead part 14 C and lead part 16 C similar to those of the fifth embodiment are formed at the internal conductor layers 14 and 16 . While not shown, the terminal electrodes 34 and 36 (see FIG. 6 ) are similarly connected to these lead parts 14 C and 16 C.

Further, three cuts 18 o to 18 q are formed from the bottom side and top side in FIG. 9 in parallel and in an inclined direction offset from each other in an internal conductor layer 14 . Further, an internal conductor layer 16 is formed with three cuts 18 r to 18 t in parallel and in an inclined direction offset from each other in a substantially reverse positional relationship from the internal conductor layer 14 .

That is, in the same way as the second embodiment, while cuts in an inclined direction are provided, three cuts are formed at each of the internal conductor layers 14 and 16 . Therefore, an internal conductor layer 14 are divided into four channel parts 20 A, 20 B, 20 C, and 20 D across the cut parts 18 o to 18 q . Further, in the same way, an internal conductor layer 16 is divided into the four channel parts 22 A, 22 B, 22 C, and 22 D across the cut parts 18 r to 18 t.

Due to the above, while there is a difference that the number of cut parts 18 is greater, the present embodiment also exhibits actions and effects similar to the first embodiment and second embodiment.

Seventh Embodiment

Next, a seventh embodiment of a multilayer capacitor according to the present invention will be explained based on FIG. 10 . Note that members common with members explained in the first embodiment are assigned the same reference numerals and overlapping explanations are omitted.

The capacitor of the present embodiment is structured substantially in the same way as the capacitor of the first embodiment. In the present embodiment, as shown in FIG. 10 , the lead part 14 C and the lead part 16 C similar to the fifth embodiment are formed at the internal conductor layers 14 and 16 . While not shown, the terminal electrodes 34 and 36 (see FIG. 6 ) are similarly connected to the lead parts 14 C and 16 C.

Further, the internal conductor layers 14 and 16 of the present embodiment are also provided with cut parts 18 , but the internal conductor layers 14 of the present embodiment have two cut parts 18 u and 18 v extending in the horizontal direction above and below. Further, the part of an upper cut part 18 v close to the left side is bent upward and extends upward until the top end of the internal conductor layer 14 , while the part of a lower cut part 18 u close to the left side is bent downward and extends downward until the bottom end of the internal conductor layer 14 . These cut parts 18 u and 18 v are substantially L-shaped.

Further, an internal conductor layer 16 of the present embodiment has two cuts extending in the left-right direction above and below, but these cuts are connected at the right ends to form a single substantially U-shaped cut part 18 w.

In the present embodiment, in the same way as the second and third embodiments, an internal conductor layer 14 is divided into three channels 20 A, 20 B, and 20 C across cut parts 18 , while an internal conductor layer 16 is divided into three channels 22 A, 22 B, and 22 C across cut parts 18 . Therefore, in the present embodiment, in the same way as the second and third embodiments, the total length of the channel parts through which current can flow becomes longer and the effect of reduction of the equivalent serial inductance is increased more.

Next, a network analyzer was used to measure the S 21 characteristic of the S-parameter of the following samples and find the attenuation characteristics of the samples. First, the content of the samples will be explained. That is, as the capacitor, the general multilayer capacitor shown in FIG. 14 was used as a comparative example and the multilayer capacitor according to the first embodiment shown in FIG. 1 was used as an example of the invention.

Here, the constants of the equivalent circuit were calculated so that the measured value of the attenuation characteristic and the amount of attenuation of the equivalent circuit in the multilayer capacitor 100 shown in FIG. 12 matched. Further, from the data of the attenuation characteristics of the samples shown in FIG. 11 , it is learned that the amount of attenuation of the example in the high frequency band of 5 MHz or more increased by about 5 dB compared with the comparative example. Therefore, from the data, it can be understood that improvement of the high frequency characteristics is seen in the example.

On the other hand, relating to the calculated ESL as well, the ESL was greatly reduced to 172.7 pH compared with the 288.5 pH of the comparative example. The effect of the present invention could be confirmed by being verified by these values.

Here, relating to the dimensions of the samples used, as shown in FIG. 14 and FIG. 1 , the length W and the length W were, in both the comparative example and example of the invention, W=3.2 mm, L=2.5 mm, and T=2.5 mm. Further, the electrostatic capacities of the samples used for the tests were 10.03 μF for the comparative example and 9.25 μF for the example of the invention.

Note that the present invention is not limited to the above embodiments and can be modified in various ways within the scope of the invention. For example, the multilayer capacitor 10 according to the above embodiments was structured having two types of internal conductor layers, but the number of layers is not limited to the numbers shown in the embodiments and may be made greater numbers as well.

According to the present invention, it becomes possible to provide a multilayer capacitor capable of greatly reducing the effective inductance and reducing the voltage fluctuations of the CPU power source.