Apparatus and method for transmission and remote sensing of signals from integrated circuit devices

The present invention relates generally to an apparatus and a method for the transmission and sensing of signals in selected portions of semiconductor integrated circuits or chips containing a plurality of individual circuits therein. More particularly, the present invention is directed to a transmission and sensing circuit arrangement especially useful in measuring currents in selected portions of semiconductor Integrated circuits.

As is well known in the art, an Integrated circuit chip is comprised of a plurality of individual circuits and, as the elements forming the individual circuits in the integrated circuit chip have become smaller, each individual circuit in the chip also becomes denser causing an exponential increase especially in standby or quiescent currents in the chip and in each such individual circuit. Furthermore these increased currents contribute directly to excessive power dissipation in the chip and affects, through heating, the performance and reliability of the chip. Furthermore defective portions of integrated circuits often draw significantly increased current that can be used to identify defective portions of the integrated circuit. Therefore it is desirable, during the design and testing of an integrated circuit chip, to be able to accurately measure all such quiescent currents at numerous locations in a circuit or at different numerous locations in a plurality of different circuits throughout the chip in order to accurately measure the quiescent current in each circuit or selected portion thereof. In order to characterize and diagnose design or processing efficacy.

The prior art attempted to mitigate this problem by monitoring the current at multiple locations in such circuits while under test with built in current sensors (BICS). However, these prior art BICS have various shortcomings that adversely impact the circuits under test for they are interactive and thus introduce parasitic resistance, additional capacitance or inductance, while consuming unproductive chip area by requiring extra inputs and outputs, additional wiring, and tester hardware to transmit the current measurement data off-chip.

Accordingly, the present invention is designed to circumvent the above difficulties and avoid the above described difficulties encountered by the prior art. The present invention achieves these ends by providing a circuit layout and current-monitoring apparatus and a method that is passive, remote, has little or no parasitic electrical impact on the circuit under test, minimizes the impact on circuit layout, or area, and provides wide frequency response. The present invention also has minimal impact on circuit performance and provides analog current information from multiple locations simultaneously without crosstalk, interference, or noise.

The present invention achieves all of these desirable results, in a novel circuit; in which the current from a circuit under test, passing to ground, is directed through a first respective selected predetermined path and location to establish in each such circuit under test, a focused magnetic field at a known position; converting each such focused magnetic field into a respective “Hall voltage”, feeding each respective Hall voltage to a respective amplifier that is strobed or gated with a respective selected frequency; to modulate, in the amplifier, the converted Hall voltage and thereby provide, at the output of said amplifier, current pulses at the frequency of said respective selected frequency; passing said current pulses through a second predetermined path to ground to establish in said second path a pulsating magnetic field; and, detecting said pulsating magnetic field with a remote magnetic sensor to provide an electrical output directly proportional to the current in said first path at the respective selected frequency.

The remote sensor is preferably a respective superconducting quantum interference device (SQUID) whose output is directed to a lock-in amplifier that is synchronized with the respective frequencies pulsing the sensed magnetic field transmitters. The present invention thus eliminates crosstalk between the individual magnetic field transmitters, noise in the form of extraneous magnetic fields, and increases the output read from each circuit under test.

The present invention also teaches a method for the remote magnetic field sensing and readout at known frequencies.

The present invention by providing each circuit under test with a first respective magnetic field concentrator arranged to determine the quiescent current in a selected portion of an integrated circuit by sensing the current therein, converting the sensed current to a Hall voltage, modulating this Hall voltage with a known frequency, amplifying the modulated voltage to create a modulated current through a second magnetic field concentrator to create a pulsating magnetic field and detecting this pulsating magnetic field with a remote sensor to provide an output signal proportional to the original sensed current.

The current in each circuit, in a plurality of integrated circuits, can be measured by using a distinct frequency for each circuit being measured to create distinct pulsed magnetic fields and distinct pulsed output signals and sending the output signal of each respective remote sensor to a lock-in amplifier that is synchronized with the frequencies used to create the pulsed magnetic fields so that the output of the lock-in amplifier provides analog current information from each sensing location without crosstalk between the sensing circuits and without noise in the form of stray extraneous magnetic fields and other induced errors in the tested circuit.

These objects, features and advantages of the present invention will become further apparent to those skilled in the art from the following detailed description taken in conjunction with the accompanying drawings wherein:

FIG. 1 is a schematic view of signal transmitter and sensor circuits of the present invention.

FIG. 2 illustrates the frequency modulated magnetic field realized by the remote superconducting quantum interference device of FIG. 1 ;

FIG. 3 schematically illustrates a chip having therein a plurality of circuits to be tested in which each circuit is provided with the present invention for determining the current in each circuit.

FIG. 4 is a sectional view of a schematically illustrated wafer level test assembly employing the present invention;

FIG. 5 schematically illustrates the housing detail of the superconducting quantum interference device used in the present invention, and

FIG. 6 is a sectional view of a schematically illustrated package level test assembly employing the present invention.

Referring now to FIGS. 1 through 6 the present invention will be described in detail, wherein: FIG. 1 is a schematic view of signal transmitter and sensor circuits of the present invention; FIG. 2 illustrates the frequency modulated magnetic field realized by the remote superconducting quantum interference device of FIG. 1 ; FIG. 3 schematically illustrates a chip having therein a plurality of circuits to be tested in which each circuit is provided with the present invention for determining the current in each such circuit; FIG. 4 schematically illustrates a wafer level test assembly employing the present invention; FIG. 5 illustrates the housing detail of the superconducting quantum interference device used in the wafer level test assembly of FIG. 4 and FIG. 6 illustrates a package level test assembly employing the present invention.

With reference now to the drawings and especially FIGS. 1 and 2 , there is schematically shown, in FIG. 1 , a circuit 10 coupled between to a voltage supply 35 and ground 12 through a magnetic field concentrating loop 14 . When the circuit 10 is activated it draws a current IDD from the voltage source 35 through the concentrating loop 14 and a magnetic field is generated adjacent the loop. A magnetic field sensor 19 , such as a Hall Effect sensor is positioned adjacent to the concentrating loop 14 and within the generated magnetic field created by the current through the conducting loop 14 . This generated magnetic field will cause the sensor. 19 to produce a Hall Voltage H V that is proportional to the current through the loop 14 , i.e. V H ∝IDD. This generated Hall Voltage H V is fed to the first input 21 of a strobed or gated amplifier 20 . Simultaneously, a selected frequency f, is delivered from the ring oscillator 23 driven by a suitable enable signal from a suitable enable signal source 24 , is applied to the second input 22 of the gated amplifier 20 to create a pulsed current I OUT indicated by arrow 27 . This pulsed current flow I OUT flows through a second concentrating loop 25 coupled to ground 12 .and generates a strobed magnetic field 26 . This strobed magnetic field 26 is now detected by SQUID 28 . The SQUID 28 measures the amplitude modulated magnetic field 26 and generates the frequency modulated output signal 29 shown in FIG. 2 whose amplitude is directly proportional to the current flow I DD through the first concentrating loop 14 .

The SQUID 28 is a commercially available device designed to measure extremely weak magnetic signals, and may be either designed for radio frequencies measurements or for direct current measurements.

Basically a SQUID is a Josephson junction device, formed of two different superconductors, e.g. a top layer formed of lead with 10% gold or indium and a bottom layer of niobium, separated by an electron tunneling barrier. Such SQUIDs are sensitive enough to detect a change of magnetic energy 100 billion times weaker than the electromagnetic energy required to move a compass needle. Because they are so sensitive they are extremely efficient remote sensors and need not come in contact with a system that they are testing.

A radio frequency SQUID is made up of a Josephson junction mounted on a superconducting ring such that when an oscillating current is applied to an external circuit, its voltage changes as an effect of the interaction between it and the ring. The magnetic flux is then measured. The direct current (DC) SQUID is much more sensitive and consists of two Josephson junctions employed in parallel so that electrons tunneling through the junctions demonstrate quantum interference, dependent upon the strength of the magnetic field within a loop and thus demonstrate resistance in response to even tiny variations in a magnetic field. This is the feature that enables the detection of such minute changes in magnetic fields.

FIG. 3 schematically illustrates a chip having therein a plurality of circuits to be tested. Each circuit employs the present invention to determine the current in each circuit. In this FIG. 3 there is shown, for example, four separate circuits 30 , 31 , 32 , and 33 each of which is coupled to a voltage source 35 , via a respective magnetic concentration loop 30 a , 31 a , 32 a , 33 a , and to ground 36 . Thus when each circuit is active a respective current exists between the voltage source 35 and ground 36 via its respective concentration loop, i.e., in circuit 30 the current IDD 1 passes through the loop 30 a , in circuit 31 the current IDD 2 , passes through the loop 31 a , in circuit 32 the current IDD 3 passes through the loop 32 a , and in circuit 33 the current IDD 4 passes through the loop 33 a . It is to be understood that although only four such circuits are shown in the present, that as a practical matter when testing a semiconductor chip that many different circuits or portions thereof may need to be checked and measured. Further more, the currents drawn by or existing in each circuit or portion thereof can be different from the current existing in any other circuit. Thus, during test, it is necessary to correctly establish the value of the current in each circuit or portion thereof. That is all the currents, IDD 1 , 1 DD 2 , IDD 3 and IDD 4 need to be measured.

The present invention does so by placing a respective magnetic concentration loop 30 a , 31 a , 32 a , and 33 a in each circuit or portion whose current is to be determined and placing a respective Hall Effect sensor in each respective concentration loop. Thus, In FIG. 3 , a Hall sensor 19 a is placed in concentration loop 30 a , sensor 19 b is placed in concentration loop 31 a , sensor 19 c is placed in concentration loop 32 a , and sensor 19 d is placed in concentration loop, 33 a . The signal from each respective Hall-effect device 19 a , 19 b , 19 c , and 19 d is fed to the first input of a respective gated amplifier. Thus the output of Hall-effect device 19 a , is fed to the first input 21 a of a respective gated amplifier 20 a , the output of Hall-effect device 19 b , is fed to the first input 21 b of a respective gated amplifier 20 b , the output of Hall-effect device 19 c is fed to the first input 21 c of a respective gated amplifier 20 c , and the output of Hall-effect device 19 d , is fed to the first input 21 d of a respective gated amplifier 20 d . The other input of each amplifier 20 a , 20 b , 20 c , and 20 d is coupled to a respective ring oscillator 23 a , 23 b , 23 c , and 23 d so that a respective frequency f 1 , f 2 , f 3 , and f 4 may be generated by each respective ring oscillator into each respective amplifier 20 a , 20 b , 20 c , and 20 d . These frequencies f 1 , f 2 f 3 , and f 4 cause the output of each respective amplifier 20 a , 20 b , 20 c , and 20 d to pulse at the frequency applied to the amplifier. The output of each amplifier 20 a , 20 b , 20 c , and 20 d is in turn coupled to ground through a respective magnetic field concentrator 25 a , 25 b , 25 c , and 25 d to produce around each magnetic field concentrator 25 a , 25 b , 25 c , and 25 d , a respective pulsating magnetic field B f1 , B f2 , B f3 , and B f4 . Each magnetic field B f1 , B f2 , B f3 , and B f4 is pulsating at the frequency applied to its respective amplifier. Thus the magnetic field B f1 produced around concentrator 25 a is pulsating at the frequency f 1; the magnetic field B f2 produced around concentrator 25 b is pulsating at the frequency f 2 , the magnetic field B f3 produced around concentrator 25 c is pulsating at the frequency f 3 , and the magnetic field B f4 produced around concentrator 25 d is pulsating at the frequency f 4 . These pulsating magnetic fields B f1 , B f2 , B f3 , and B f4 are detected by the SQUID sensors 28 a , 28 b , 28 , c and 28 d respectively. The information detected by each respective SQUID sensor 28 a , 28 b , 28 , c and 28 d is transmitted to a lock-in amplifier 30 that is synchronized with the frequencies f 1 , f 2 , f 3 , and f 4 so that output of the lock-in amplifier 30 can be set to provide an output indicative of each respective current IDD 1 , 1 DD 2 , IDD 3 or IDD 4 .

FIG. 4 is a sectional view of a schematically illustrated wafer level test assembly employing the present invention. In FIG. 4 , a wafer 41 is shown mounted on a wafer chuck 42 . The wafer 41 contains a plurality of chips such as chips 41 a , 41 b , 41 c , 41 d and 41 e . For purposes of illustration only it will be presumed that chip 41 b contains the four separate circuits 30 , 31 , 32 , and 33 shown in FIG. 3 . The wafer 41 has its back or inactive side 40 mounted on a wafer chuck 42 containing a plurality of SQUID assemblies 28 a , 28 b , 28 c , and 28 d.

FIG. 5 is an enlargement of a portion of FIG. 4 and schematically illustrates the housing detail of the superconducting quantum interference device used in FIG. 4 . Each SQUID assembly 46 is, as shown in FIG. 5 comprised of a plurality of remote SQUIDs 28 a , 28 b , 28 c and 28 d mounted in a cooling apparatus 47 . Each such SQUID is of course electrically coupled, via lines 29 a , 29 b , 29 c , and 29 d to suitable circuitry (not shown) in order to determine the current in each circuit being tested and each is positioned to detect and measure a respective pulsating magnetic field. Thus SQUID 28 a detects field B f1 , SQUID 28 b detects field B f2 , SQUID 28 c detects field B f3 and SQUID 28 d detects field B f4 . Such SQUID assemblies are presently commercially available and can be designed to conform to any desired circuit design or arrangement.

For purposes of illustration only, it will be assumed in FIGS. 4 and 5 that the magnetic concentration loops 25 a , 25 b , 25 c and 25 d are arranged in line so that a test unit 43 , having a plurality of probes 44 positioned in contact with chip 41 b , can provide power to the circuits 30 a , 31 a , 32 a , and 33 a in a manner well known to the art. When the circuits 30 a , 31 a , 32 a , and 33 a are powered up and operated as above described, the pulsating fields B f1 , B f2 , B f3 , and B f4 are created. When the SQUID sensors 28 a , 28 b , 28 c and 28 d are located beneath the chip 41 b as shown in FIGS. 4 and 5 each one of the pulsating fields B f1 , B f2 , B f3 , and B f4 are detected by a respective one of the SQUID sensors 28 a , 28 b , 28 c and 28 d . Although in FIG. 5 the SQUID sensors 28 a , 28 b , 28 c and 28 d are shown mounted on cold fingers arranged in a line, it should be understood that the SQUID sensors 28 a , 28 b , 28 c and 28 d will actually be positioned in any configuration that will permit each to sense a respective one of the pulsating fields Bf 1 , Bf 2 , Bf 3 and Bf 4 created as above described.

As shown in FIG. 5 the SQUID sensors 28 a , 28 b , 28 c and 28 d are positioned in an evacuated cavity 48 sealed by a protective window 49 that is transparent to the pulsating magnetic fields. Port 50 is used to evacuate the cavity 48 and electrical leads 29 a , 29 b , 29 c and 29 d , as shown in FIGS. 3 and 5 , lead from each respective sensor to the lock-in amplifier 30 .

FIG. 6 is a sectional view of a schematically illustrated test arrangement designed to measure, in accordance with the present invention, the currents in a chip 50 under various test conditions. Here a chip 50 has been designed and provided with the necessary magnetic field concentrators, Hall converters, amplifiers and etc. as described in conjunction with FIG. 1 of the present invention. The chip 50 is then mounted such that its active face 52 is mounted against a wiring substrate, as is well known to the art. When so mounted the chip can be electrically activated though the substrate and subjected to various selected tests as is well known to the art. By employing the present invention circuit in selected portions of such substrate mounted chips can be measured by placing the back or inactive face 55 of the chip 50 in contact with a remote sensor arrangement 56 , designed for the chip under test, and measuring, as above described, the actual currents in selected portions of the powered up chip.

The present invention thus teaches a simple, inexpensive and automatic way of measuring with great accuracy the actual currents in a semiconductor chip under various operating conditions.

This completes the description of the preferred embodiment of the invention. Since changes may be made in the above construction without departing from the scope of the invention described herein, it is intended that all the matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

Other alternatives and modifications will now become apparent to those skilled in the art without departing from the spirit and scope of the invention as set forth in the following claims.