Local oscillator using I/Q mismatch compensating circuit through LO path receiver using thereof

The present invention relates to a communication system. Specifically, the invention is directed to a circuit for compensating phase mismatch generated between in-phase signal and quadrature-phase signal of a receiver.

FIG. 1 shows a schematic circuit diagram of the conventional radio frequency receiver.

As shown in FIG. 1 , the conventional radio frequency receiver comprises a low-noise amplifier 110 , first and second mixers 120 , 130 , a local oscillator 140 and first and second base-band circuits 150 , 160 .

Low-noise amplifier 110 amplifies radio frequency signal received by an antenna to apply the signal to first and second mixers 120 , 130 . First and second mixers 120 , 130 mix the amplified radio frequency signal with in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q to output intermediate frequency or base band signal, respectively. First and second base-band circuits 150 , 160 amplify/filter the signal outputted from first and second mixers 120 , 130 , respectively to output in-phase signal I and quadrature-phase signal Q.

In radio communication system, radio frequency receiver transmits data by carrying it in in-phase channel and quadrature-phase channel. Thus, in order to restore signal completely, in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q are necessary. If the difference between the phases of LO I and LO Q does not equal 90 degree, bit error rate increases in the restored signal. In particular, tile mismatch between in-phase signal I and quadrature-signal Q causes significant problem in the system of direct-conversion receiver and image-removing receiver.

However, the characteristic of delay cells of the local oscillator does not ideally match due to thickness of insulator, device size, space difference, various crystal structure of semiconductor material, mismatch of layout and the like. Such a mismatch of delay cells causes mismatch between in-phase local oscillating signal LO I and quadrature-phase signal LO Q outputted from the local oscillator. This is an important cause of generating mismatch between I/Q signals of the receiver. Further, mismatch between devices in way of I and Q path of the receiver is one of causes generating I/Q mismatch of radio frequency receiver.

As clearly understood from a person skilled in the art, size mismatch between in-phase signal I and quadrature-phase signal Q is not significant cause. However, phase mismatch may cause significant problem due to path difference between two signals and device characteristic as frequency increase.

In conventional art, the phase mismatch is corrected with compensation of in-phase signal I and quadrature-phase signal Q of base band that pass a mixer or with compensation of the paths of radio frequency signals I and Q. However, these corrections require additional correction circuit in signal path. The addition of correction circuit to a path where signal passes may degrade gain, noise, linearity and the like. Further, it is difficult to apply the technique in already-manufactured circuit,

The object of the present invention is to provide a circuit for correcting phase mismatch between in-phase signal and quadrature-phase signal in a receiver.

Another object of the present invention is to provide a circuit for correcting phase mismatch between in-phase local oscillating signal and quadrature-phase signal outputted from a local oscillator.

Still other object of the present invention is to provide a circuit for correcting phase mismatch between in-phase signal and quadrature-phase signal without substantially affecting gain, noise and linearity and the like of overall system.

Still further object of the present invention is to provide a circuit for correcting in-phase signal and quadrature-phase signal that can be easily applied to already-manufactured circuit.

The local oscillator of the present invention provides in-phase local oscillating signal and quadrature-phase signal to first and second mixers outputting input signal with mixing in-phase local oscillating signal and quadrature-phase local oscillating signal, respectively. The local oscillator comprises a local oscillating unit which has first and second delay cells and which outputs the in-phase local oscillating signal and the quadrature-phase local oscillating signal, and a correction circuit for controlling phase matching characteristic between the in-phase local oscillating signal and the quadrature-phase local oscillating signal-outputted from the local oscillating unit. The correction circuit sets bias current flowing in the first and second delay cells of the local oscillating unit as being different.

The first delay cell of the local oscillating unit may have + and − input nodes, + and − output nodes and a correction node. The cell converts phase of signal applied to the + and − input nodes and outputs it to the − and + output nodes. The second delay cell of the local oscillating unit has + and − input nodes which connect with the − and + output nodes of the first delay cell, − and + output nodes which connect with the + and − input nodes of he first delay cell and the correction node. File cell converts phase of signal applied to the + and − input nodes and outputs it to the − and +output nodes. Further, bias current flowing in the first and second delay cells is controlled by current flowing in the correction node.

The correction circuit may comprise first and second varying-current sources. The first and second varying-current sources are connected between the correction node of the first and second delay cells and first power.

In second aspect of the invention, a local oscillator comprises a local oscillating unit which has first and second delay cells and outputs in-phase local oscillating signal and quadrature-phase local oscillating signal, and a correction circuit for correcting phase matching characteristic between the in-phase local oscillating signal and the quadrature-phase local oscillating signal outputted from the local oscillator. The correction circuit sets bias voltage applied to first and second delay cells as being different.

In third aspect of the invention, a local oscillator comprises a local oscillating unit which has first, second and third terminals, first and second delay cells comprising active devices controlling current flowing to the third terminal from the second terminal in proportion to voltage applied to the first terminal, and a correction circuit which has first, second and third terminals connecting with the first, second and third terminals of the active device, respectively and which controls phase matching characteristic between the in-phase local oscillating signal and the quadrature-phase local, signal outputted from the local oscillating unit by setting width of active device included in the first and second delay cells as being different. The oscillating unit outputs the in-phase local oscillating signal and the quadrature-phase local signal.

The correction circuit may have first, second and third terminals, one or more active devices and switching means. The active device controls current flowing to the third terminal from the second terminal in proportion to voltage applied to the first terminal. The first terminal of the active device forms the first terminal of the correction circuit. The second terminal forms the second terminal of the correction circuit. The third terminal of the active device is connected with one end of the switching means and the other end of the switching means forms the third terminal of the correction circuit.

The active device may be nMOSFET device; the first terminal may be a gate and; second terminal may be a drain; and (he third terminal is a source.

The active device may be pMOSFET device; the first terminal may be a gate; the second terminal may be a source; and said third terminal may be a drain.

In forth aspect of the invention, a local oscillator comprises a local oscillating unit which comprises first and second delay cells comprising passive device having specific impedance and which outputs the in-phase local oscillating signal and the quadrature-phase local oscillating signal; and a correction circuit having first and second terminals connecting with one end and the other end of the passive device and for controlling phase matching characteristics between the in-phase local oscillating signal and the quadrature-phase local oscillating signal which are outputted from the local oscillator by making impedance of the passive device included the first and second delay cells as being different.

The correction circuit may comprise a passive device and switching means having specific impedance. One end of the passive device may be connected with the first terminal of the correction circuit. The other end is connected with the one end of the switching means, and the other end of the switching means are connected with the second terminal of the correction circuit.

The passive device may be an inductor.

The passive device may be a capacitor.

A receiver of the present invention comprises a local oscillator having first and second delay cell and outputting in-phase local oscillating signal and quadrature-phase local oscillating signal; first and second mixers which mix input signal with the in-phase local oscillating signal and the quadrature-phase signal, respectively and output the mixed signal; and a correction circuit for controlling phase matching characteristic between the in-phase local oscillating signal and the quadrature-phase local oscillating signal outputted from the local oscillator. The correction circuit sets bias voltage applied to first and second delay cells as being different.

In second aspect of the invention, a receiver comprises a local oscillator having first and second delay cell and outputting in-phase local oscillating signal and quadrature-phase local oscillating signal; first and second mixers which mix input signal with the in-phase local oscillating signal and the quadrature-phase signal respectively and output the mixed signal; and a correction circuit for controlling phase matching characteristic between the in-phase local oscillating signal and the quadrature-phase local oscillating signal outputted lions the local oscillator. The correction circuit sets bias voltage applied to first and second delay cells ass being different.

In third aspect of the present invention a receiver comprises a local oscillator having first, second and third terminals, first and second delay cells comprising active devices controlling current flowing to the third terminal from the second terminal in proportion to voltage applied to the first terminal; first and second mixers which mix input signal with the in-phase local oscillating signal and the quadrature-phase signal, respectively and output the mixed signal: and a correction circuit having first, second and third terminals connecting with the first, second and third terminals of the active device, respectively and for correcting phase matching characteristic between signals outputted from the first and second mixers by setting width of active device included in the first and second delay cells as being different.

The oscillator outputs the in-phase local oscillating signal and the quadrature-phase local signal;

In third aspect of the invention, a receiver comprises a local oscillator which comprises first and second delay cells comprising passive device having specific impedance and outputs the in-phase local oscillating signal and the quadrature-phase local oscillating signal; first and second mixers which mix input signal with the in-phase local oscillating signal and the quadrature-phase signal respectively and output the mixed signal; and a correction circuit having first and second terminals connecting with one end and the other end of the passive device and controlling phase matching characteristics between the in-phase local oscillating signal and the quadrature-phase local oscillating signal being outputted from the local oscillator by making impedance of the passive device included the first and second delay cells as being different.

FIG. 1 shows a schematic circuit diagram of the conventional radio frequency receiver;

FIG. 2 shows a circuit diagram according to an embodiment of the present invention;

FIG. 3 shows a detailed circuit diagram of a local oscillator and a correction circuit of the circuit shown in FIG. 2 ;

FIG. 4 shows a more detailed circuit diagram of the local oscillator and correction circuit;

FIG. 5 shows a waveform of mixer gain and noise characteristics according to a local oscillating signal;

FIG. 6 shows a circuit diagram of a delay cell and correction circuit according to another embodiment of the present invention;

FIG. 7 a is a view of a correction circuit for controlling the width of a PMOS transistor;

FIG. 7 b is a view of a correction circuit for controlling width of an NMOS transistor;

FIG. 8 a shows a correction circuit for controlling inductance of an inductor; and

FIG. 8 b shows a correction circuit for controlling capacitance of a capacitor.

In the following, the preferred embodiment of the present invention will be described in detail with reference to attached drawings.

FIG. 2 shows a circuit diagram of an embodiment of the present invention.

As shown in FIG. 2 , the receiver comprises first and second mixers 210 , 230 , local oscillator 250 , detection circuit 270 , correction circuit 290 .

First and second mixers 210 , 230 mix in-phase signal LO I and quadrature-phase signal LO Q with input signal, respectively, to output base band or intermediate frequency (IF) signal.

Local oscillator 250 has first and second correction nodes 201 , 203 and outputs in-phase local oscillating signal LO I and quadrature-phase signal LO Q which have the same amplitude. The phases of the signals substantially differs each other by 90 degrees. Matching characteristic of in-phase local oscillating signal LOI and quadrature-phase signal LOQ are controlled by correction signal applied to first and second correction nodes 201 , 203 .

As described in the below local oscillator 250 of the embodiment of the present invention comprises two or more delay cells and controls phase matching characteristic between output local oscillating signals with inducing mismatch between delay cells. That is, phase mismatch between in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q is controlled by generating inverse mismatch that cancels phase-mismatch between local oscillating signals. In one embodiment of the present invention, local oscillator 250 is quadrature-voltage control oscillator.

Detection circuit 270 detects mismatch between in-phase signal I and quadrature-phase signal Q that are outputted from first and second mixers 210 , 230 , respectively, and outputs first and second control signals Sctr 1 and Sctr 2 . In an embodiment of the present invention, detection circuit 270 can be carried out with conventional circuits or devices. For example, an oscilloscope can detect phase-mismatch between in-phase signal and quadrature-phase signal outputted from first and second mixers 210 , 230 . Further, detection circuit 270 detects I/Q matching characteristic of initial receiver and outputs control signal and may be removed from real receiver. In this case, initially set control signal can be applied to correction circuit continuously.

Correction circuit 290 outputs correction signal to first and second correction nodes 201 , 203 of local oscillator 250 by first and second control signal Sctr 1 , Sctr 2 that are outputted from detection circuit 270 . Although in FIG, 2 correction circuit 290 is shown as being separate from local oscillator 250 , correction circuit 290 may be installed within local oscillator 950 . In this constitution, the local oscillator comprises local oscillating part 250 and correction circuit 290 .

Various embodiments of I/Q mismatch correction circuit of receiver through LO path will be described in detail. The spirit of the present invention can be applied to all concepts of correcting I/Q mismatch of receiver through LO path without limiting to the specific embodiment

FIG. 3 shows a detailed circuit diagram of local oscillator 250 and correction circuit 290 of FIG. 2 .

As shown in FIG. 3 , local oscillator 250 comprises first and second delay cells 310 , 330 and correction circuit 290 comprises first and second varying-current sources I 31 , I 32 . As clearly understood from a person skilled in the art, the number of the delay cells of local oscillator 250 and the number of varying-current source of correction circuit 290 do not limit the scope of the present invention.

In the following, the constitution and connection relationship between the components will be described with reference to FIG. 3 .

First delay cell 310 of local oscillator 250 has + and − input nodes, + and − output nodes and correction node 301 and converts signal phase applied to + and − input nodes to transmit it to − and +output nodes, respectively. Second delay cell 330 of local oscillator 250 has + and − input nodes, + and − output nodes and correction node 303 and converts signal phase applied to + and − input nodes to transmit it to − and + output nodes, respectively.

In the local oscillator, first and second delay cells 310 , 330 arc ring-connected each other. That is, − and +output nodes of first delay cell 310 are connected with + and − input nodes of second delay cell 330 . Correction nodes 301 , 303 of first and second delay cell 310 , 330 forms first and second correction nodes 201 , 230 of local oscillator 250 , respectively.

First and second varying-current sources I 31 , I 32 of correction circuit 290 are connected with, first and second correction nodes 201 , 203 of local oscillator 250 , respectively and supplies current to first and second correction nodes 201 , 202 of local oscillator 250 .

In the following, the operation of local oscillator 250 and correction circuit 290 .

Local oscillator 250 outputs in-phase local oscillating signal LO I and quadrature-phase oscillating signal LO Q with ring-connecting first and second delay cells 310 , 330 each other. That is, − and + output nodes of first delay cell 310 output signal having phase of 90 degrees and signal having phase of 270 degrees, respectively. The signals have substantially same amplitude. − and +output nodes of second delay cell 330 output signal having phase of 180 degrees and signal having phase of 0 degree, respectively. The signals have substantially same amplitude. Thus, in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q of quadrature-phase local oscillator 250 can be obtained by use of the output signal of + output node of second delay cell 330 and − output node of first delay cell 310 or by use of the output signal of ˜ output node of second delay cell 330 and + output node of first delay cell 310 .

First and second varying-current sources I 31 , I 32 of correction circuit 290 determine current value by first and second control signal Sctr 1 , Sctr 2 outputted from detection circuit 270 and supply current to correction nodes 301 , 303 of first and second delay cell 310 , 330 . That is, correction circuit 290 of one embodiment of the present invention makes the current value supplied to first and second delay cells 310 , 330 different each other, thereby controlling phase-match characteristic between in-phase local oscillating signal and quadrature-phase local oscillating signal outputted from the local oscillator. In other words, the circuit generates inverse-mismatch for canceling phase-mismatch between local oscillating signals through first and second varying-current sources I 31 , I 32 , thereby restraining phase-mismatch between local oscillating signals.

In another embodiment of the present invention, the phases of in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q can be pre-distored, by making the current flowing in first and second delay cells 301 , 330 of local oscillator 250 different each other by phase-mismatch to be generated between base band in-phase signal I and base band quadrature-phase signal Q. Therefore, the phase-mismatch between in-phase signal I and quadrature-phase signal Q can be corrected. However, amplitude mismatch between, first and second local oscillating signal LO I and LO Q . The amplitude mismatch doe not affect the receiver substantially.

FIG. 4 shows a more detailed circuit diagram of local oscillator 250 and correction circuit 290 . Since first delay cell 310 and first varying-current source I 31 are substantially same as second delay cell 330 and second varying-current source I 32 , only first delay cell 310 and first bias current I 31 are illustrated.

As shown in FIG. 4 , first delay cell 310 comprises first to sixth PMOS transistors MP 41 to MP 46 , first and second NMOS transistor MN 41 , MN 42 , inductor L 41 and capacitor C 41 .

In the following, local oscillator 250 and correction circuit 290 are described in detail with reference to FIG. 4 . However, the constitution and operation of components that are away from the spirit of the present invention will not be described since first delay cell 310 shown in FIG. 4 is well-known and the invention is not limited to a specific embodiment.

First PMOS transistor MP 41 of first delay cell 310 is a device of supplying bias current to first delay cell 310 and determines current flowing third to sixth PMOS transistors MP 43 to MP 46 . Gates of first and second NMOS transistors MN 41 , MN 42 are cross-coupled each other to connected to corresponding drain. The sources are sounded to form −gm of first delay cell 310 .

The source of second PMOS transistor MP 42 is connected to power and its gate is connected to the gate of first PMOS transistor MP 41 . Thus drain of first PMOS transistor MP 41 flows the current which is same as the current flowing the drain of second PMOS transistor MN 42 .

Inductor L 41 and capacitor C 41 resonate each other to let local oscillator 250 oscillate desired resonant frequency.

First varying-current source I 31 of correction circuit 20 supplies current to the drain of second PMOS transistor MP 42 and determines the supplied current amount with first control signal Sctr 1 . Thus, the drain of first PMOS transistor MP 41 flows current which is substantially same as the current supplied to first varying-current source I 31 . Thus, the current flowing in delay cell 310 can be controlled by varying current of first varying current source I 31 .

The receiver in accordance with an embodiment of the present invention corrects phase-mismatch between local oscillating signals applied to first and second mixers 210 , 230 respectively, by making the bias current flowing in first and second delay cells 310 , 330 different each other. That is, since I/Q signal mismatch of the receiver is corrected with LO path, gain, noise and linearity of overall system is not substantially affected.

Further, detection circuit 270 may be mounted outside radio frequency receiver circuit. In this constitution, first and second bias current I 31 , I 32 of correction circuit 290 can be controlled outside. Thus, it is not necessary to provide additional circuit within a correction circuit, thereby making it easy to apply to already-manufactured circuit.

FIG. 5 shows a waveform of mixer gain and noise characteristic according to local oscillating signal.

As shown in FIG. 5 mixer gain and noise characteristic do vary hardly if the amplitude of local oscillating signal is not less than a predetermined level. Further, since the local oscillating signal of radio frequency receiver uses signal not lets than Vc shown in FIG. 5 generally, amplitude mismatch generated in the local oscillating signal hardly affect mixer gain or noise characteristic. Thus, the amplitude mismatch generated by flowing bias current different each other in first and second delay cell 310 , 330 , does not affect to a system substantially.

FIG. 6 shows a circuit diagram of delay cell and correction circuit of another embodiment of the present invention.

As shown in FIG. 6 , the correction circuit of the embodiment differs from the correction circuit shown in FIGS. 3 and 4 in that it controls output signal phase by setting bias voltage applied to each delay cell of local oscillator differently.

The correction circuit controls current flowing in the drain of first PMOS transistor MP 61 by controlling voltage applied to first PMOS transistor MP 61 . That is, the current flowing in each delay cell can be controlled by setting bias voltage of first and second delay cells 310 , 330 differently. Further, the phase mismatch between in-phase local oscillating signal and quadrature-phase signal that are outputted from local oscillator 250 can be corrected by the setting.

FIGS. 7 a and 7 b show a circuit diagram of the correction circuit of still other embodiment of the present invention.

FIG. 7 a is a correction circuit for controlling width of PMOS transistor and FIG. 7 b is a correction circuit for controlling width of NMOS transistor.

Generally, in a delay cell using active devices, the active devices are connected parallel. That is, the actual width of the active devices varies in accordance with the number of parallel-connected active devices. Thus, mismatch between output signals of first and second delay cells 310 , 330 can be induced by setting on-off each switching means of the active devices differently.

In the following, the constitution and operation of the correction circuit of FIGS. 7 a and 7 b are described in detail.

FIG. 7 a is for controlling the width of PMOS transistor of first and second delay cell 310 , 330 and includes one or more PMOS transistor MPa and switching means SW 11 .

The gates of PMOS transistors MPa, MPb, MPc of the correction circuit are connected one another to form first terminal 701 . The sources of the transistors are connected to one another to form second terminal 702 . Further, the drains of PMOS transistor MPa, MPb, MPc are connected to one end of first to third switching means SW 11 , SW 12 , SW 13 . The other end of first to third switching means SW 11 , SW 12 . SW 13 are connected to one another to form third terminal 703 of the correction circuit.

FIG. 7 b is for controlling the width of NMOS transistor of first and second delay cell 310 , 330 and comprises one or more NMOS transistor MNa and switching means SW 21 .

The gates of MNa, Mnb, MNc of each NMOS transistor of the correction circuit are connected one another to form first terminal 711 of the correction circuit. The drains of the transistors are connected one another to form second terminal 712 . Further, the sources of each NMOS transistor MNa, MNb, MNc are connected to one end of first to third switching means SW 21 , SW 22 , SW 23 . The other end of first and third switching means SW 21 , SW 22 . SW 23 are connected to one another to form third terminal 713 .

In the receiver of another embodiment of the present invention, mismatch between first and second delay cell 310 , 330 can be induced by connecting the correction circuit shown in FIGS. 7 a and 7 b with one of active devices included in first and second delay cells 310 , 330 and thereafter setting on-off of each switching, means differently.

That is, first terminal 701 of the correction circuit shown in FIG. 7 a are connected with the gate of one of PMOS transistors included in first and second delay cells 310 , 330 and thereafter, the source is connected with second terminal 702 of the correction circuit. Subsequently, the drain is connected with third terminal 703 . In the same way, one of NMOS transistors included in first and second delay cell 310 , 330 is connected with first, second and third terminals 711 , 712 , 713 of the correction circuit shown in FIG. 7 b.

The correction circuit can be connected with symmetric active device included in first and second delay cell 310 , 330 . Alternatively, it may be connected with any one of delay cells. Furthers all of P-type correction circuit and N-type correction circuit are connected. In addition, specific correction circuit can be connected with a plurality of symmetric devices.

N-type and/or P-type correction circuit is connected with the symmetric active devices and control signal is applied to the switch included in each correction circuit, thereby controlling the width of each active device. That is, the phase-mismatch between output in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q can be corrected by making the width of symmetric active devise included in first and second delay cell 310 , 330 .

As described in the above, the phase of in-phase local oscillating signal LO I and quadrature-phase local oscillating signal LO Q are pre-distorted by making the width of active devices included in first and second delay cells 310 , 330 of local oscillator 250 by phase mismatch generated between base band in-phase signal I and base band quadrature-phase signal Q of the receiver different. Thus, the phase mismatch generated between in-phase signal I and quadrature-phase signal Q can be corrected.

Embodiment of Correcting Mismatch by Controlling Impedence of Passive Device Included in Delay Cell, 310 , 330

FIGS. 8 a and 8 b are circuit diagrams of collection circuits in accordance with another embodiment.

FIG. 8 a shows a correction circuit for controlling inductance of inductor included in first and second delay cells 310 , 330 . FIG. 8 b shows a correction circuit for controlling capacitance of capacitor included in first and second delay cell 310 , 330 .

As described in the above, the inductor and capacitor of first and second delay cells 310 , 330 are devices for resonating each other to make local oscillator 250 oscillate in resonant frequency. The correction circuit sets the impedance of the inductor L and capacitor C included in first and second delay cells 310 , 330 as being different, thereby correcting the mismatch between in-phase local oscillating signal LO I and LO Q .

In the following, the constitution and operation of correction circuit of another embodiment will be described in detail with reference to FIGS. 8 a and 8 b.

The correction circuit shown in FIG. 8 a comprises one or more inductor and switching means. One ends of LB 1 , LB 2 and LB 3 are connected with one another to form an end 801 of the correction circuit. The other ends arc connected with one ends of SW 31 , SW 32 and SW 33 , respectively. The other ends of switching means SW 31 , SW 32 and SW 33 are connected one another to form other ends 802 of correction circuits.

As described in the above, the correction circuit shown in FIG. 8 b comprises one or more capacitors and switching means. One ends of CB 1 , CB 2 and CB 3 are connected with one another to form an end 811 of the correction circuit. The other ends are connected with one ends of SW 41 , SW 42 , and SW 43 , respectively. The other ends of switching means SW 41 , SW 42 and SW 43 are connected one another to form other ends 912 of correction circuits.

The correction circuit shown in FIGS. 8 a and 8 b are connected with one end or the other ends of inductor or capacitor included in first and second delay cells 310 , 330 to control inductance and capacitance of the delay cells. That is, the phase mismatch between in-phase local oscillating signal LO I and quadrature-phase signal LO Q is corrected by setting inductance or capacitance of first and second delay cells 310 , 330 as being different.

In a correction circuit of still other embodiment, the mismatch of two or more delay cells consisting local oscillator are induced by setting impedance of passive device included in each delay cell as being different. Thus, according to embodiment, the correction circuit shown in FIGS. 8 a and 8 b can be provided in one delay cell or all delay cells.

According to the present invention the phase matching characteristic between in-phase signal and quadarture-phase signal by correcting the phase mismatch between in-phase local oscillating signal and quadrature-phase signal.

Further, the phase mismatch between base hand in-phase signal and quadrature-phase signal by distorting the phase of in-phase local oscillating signal and quadrature-phase signal by the phase mismatch generated in in-phase signal path and quadrature-phase signal path of a receiver.

In addition, the phase mismatch can be corrected without affecting gain, noise and linearity characteristics by correcting phase mismatch through paths of local, oscillating signal.

In already-manufactured circuits, the phase mismatch between in-phase signal I and quadrature-phase signal Q can be corrected by controlling the corrector circuit connected with the first and second delay cells of the local oscillator outside the manufactured circuits.