USPatent applicationPatented

Dual mode tuning arrangement

Granted 27 Nov 2007 · no office action yet

Current assignee: CALLAHAN CELLULAR L.L.C. · originally NXP Semiconductors

Law firm: Law firm · Log in to unlock

Attorney: Attorney · Log in to unlock

Inventors: Alan Chin Leong Yeo, Kui Yong Lim · Examiner: Sherrie Hsia · AU 2622 · TC 2600

Life of the application

9 dated events
⤢ drag to zoom20042006200820102012201420162018202020222024ProsecutionOwnershipTerm & fees
ProsecutionOwnershipTerm & feeshover for detail · click to open

Abstract

In a local oscillator for a tuning arrangement for both TV and FM signals there is substantial risk of parasitic oscillation. A special provision is disclosed for effectively reducing this risk. The special provision is a connection of a damping resistor (R 1 a ) for suppressing parsitic oscillations between ground and a junction (J 2 ) of a parallel LC resonator of the local oscillator.

Description

2 parts
›The invention relates to a dual mode tuning…

The invention relates to a dual mode tuning arrangement for tuning to VHF television signals and to FM radio signals, said arrangement having a local oscillator circuit comprising a first series arrangement of first and second inductances, a second series arrangement of a variable capacitance diode and a first padding capacitor, said first and second series arrangements being interconnected at first and second junctions to constitute a parallel arrangement, an active oscillator element being connected between the first junction of said parallel arrangement and ground, a third series arrangement of a mode switching diode and a second padding capacitor connected in parallel with one of said first and second inductances, means for supplying a tuning voltage to the junction of the variable capacitance diode and the first padding capacitor and means for supplying a mode switching voltage to the junction of the mode switching diode and the second padding capacitor. Such dual mode tuning arrangement is used in applicant's publicly available TV-FM tuner FM1200MK2.

In an arrangement of the above mentioned kind it is desirable to use the same local-oscillator circuit for both modes because the FM radio-band (88-110 MHz) lies between the VHF TV-bands. However, a different intermediate frequency is required for the reception of TV signals and the reception of FM signals. For reception of FM signals the intermediate frequency is 10,7 MHz whereas for the reception of TV signals the intermediate frequency is either 38,9 MHz (European PAL-standard) or 45,75 MHz (US NTSC-standard). Therefore the local oscillator circuit needs to be switched so that the local oscillator frequency is lower in the FM mode than in the TV mode. This is the function of the mode switch.

The nature of simple mode tuned circuits is that they have very high impedance at resonance while on either side of the resonance frequency the impedance quickly decays to very low levels. Hence in those circuits only a single oscillation is sustained. However, in dual mode tuned circuits of the above mentioned kind, unwanted or parasitic oscillations may easily occur and these parasitic oscillations have to be sufficiently damped. This is particularly critical in applications where a phase locked loop (PLL) synthesizer measures the actual frequency and uses the result to line up the tuned circuit. If the PLL would acquire an undesired oscillation it can be driven into “lock up”.

In the above mentioned publicly known tuning arrangement a provision is made to damp parasitic oscillations by grounding the junction point between the two inductances through a relatively low-value damping resistor. However it appeared that this solution is not sufficiently satisfactory. The active oscillation element (the PLL) is usually realized in integrated form and it appears that with modern PLL synthesizer IC's with improved high frequency performance the known dual mode tuned circuit still has substantial problems with parasitic oscillations. Increasing the value of the damping resistor may increase the damping of parasitic oscillation, however this solution would result in more noise with lower performance of the oscillator. Another problem is that there is a practical upper limit to the value of the damping resistor by the fact that this resistor also functions as a DC path to ground for the mode switching diode.

It is the object of the present invention to provide an improved dual mode tuning arrangement with reduced risk of parasitic oscillations and the arrangement according to the invention is therefore characterized by a damping resistor for suppressing parasitic oscillations connected between the second junction of said parallel arrangement and ground.

Apart from the reduced risk of parasitic oscillations the arrangement of the present invention has the additional advantage that the desired oscillations are substantially not influenced by the damping resistor and the advantage that the modification can be accomplished without any change of layout of the printed circuit board which usually carries the components of the arrangement.

The invention will now be described with reference to the accompanying drawings. Herein shows:

FIG. 1 a schematic diagram of the prior art dual mode tuning arrangement,

FIG. 2 graphs representing the impedance versus frequency characteristic of the arrangement of FIG. 1 in both modes,

FIG. 3 a schematic diagram of a dual mode tuning arrangement according to the invention and

FIG. 4 graphs representing the impedance versus frequency characteristic of the arrangement of FIG. 3 in both modes.

The tuning arrangement of FIG. 1 comprises a first series-arrangement of two inductors L 1 and L 2 and a second series-arrangement of a variable capacitance diode C v and a padding capacitor C p1 . The two series arrangements are interconnected at junctions J 1 and J 2 to constitute a parallel arrangement. A small capacitor C 3 is connected in parallel with the variable capacitance diode C v . The junction J 1 of the two series-arrangements is connected to an amplifier A through a coupling capacitor C 1 and a positive feedback capacitor C 2 . The amplifier A and the two capacitors C 1 and C 2 constitute the active part of the arrangement or current source S that supplies an AC current to the junction J 1 . A tuning voltage V t is applied through a resistor R 3 to the junction of the variable capacitance diode C v and the padding capacitor C p1 . The tuning voltage may be e.g. be derived from a frequency synthesizer that is located, together with the amplifier A, in a monolithic integrated circuit.

A third series arrangement of a mode switching diode C sw and a second padding capacitor C p2 is connected in parallel with the inductor L 2 and a mode-switching voltage V s is applied to the junction of the mode switching diode and the second padding capacitor through a resistor R 2 . The junction of the inductors L 1 and L 2 is grounded through a relatively small damping resistor R 1 .

›In operation, during FM reception, no switching voltage…

In operation, during FM reception, no switching voltage is applied through the resistor R 2 and the switching diode C sw behaves like a small capacitor of e.g. 1 pF. In this FM-mode the elements L 1 , L 2 , C p1 and C v +C 3 constitute a resonant circuit whose resonant frequency substantially determines the desired oscillator frequency. Varying the tuning voltage V t varies this frequency within the range required for tuning within the FM radio band. The values of the padding capacitor C p1 and the capacitor C 3 assure that the oscillator frequency substantially tracks with the tuned input circuits (not shown) at a distance of 10,7 MHz.

During reception of TV signals a positive voltage V s is applied through resistor R 2 to the mode switching diode C sw . In this mode the diode C sw behaves like a capacitance of e.g. 1 nF. This capacitance and the padding capacitor C p2 bypass the inductor L 2 , so that the resonant circuit is now formed by the elements L 1 , C v +C 3 , C p1 , C p2 and C sw .

The resistor R 1 serves to damp any parasitic oscillation of the arrangement. To analyse the parasitic oscillation behaviour of the arrangement it is convenient to consider the active current source S as a negative impedance and to calculate the (positive) impedance of the tank circuit (i.e. all elements of the arrangement except the source S) as seen by the current source S. Oscillation will take place at any frequency where the tank circuit impedance is greater than the negative impedance of the current source. For the determination of the tank-circuit impedance a stray capacitance C s1 of the junction J 1 to ground and a second stray capacitance C s2 of the junction of C sw and C p2 to ground have been taken into account.

The impedance of the tank-circuit is shown in FIG. 2 with the frequency (in MHz) along the horizontal axis and the amplitude of the impedance (in dB) along the vertical axis. For the calculation the following realistic values were chosen:

L 1 =170 nH, L 2 =120 nH, R 1 =5,6 Ω, R 2 =10 kΩ, R 3 =10 kΩ, C 3 =0,5 pF, C p1 =120 nF, C p2 =220 nF, C s1 =0,8 pF and C s2 =0,8 pF.

C v =7,5 pF which is somewhere in the middle of the tuning range.

C sw =1 pF in FM-mode and 1 nF in TV-mode.

In FIG. 2 the curve I represents the impedance of the tank-circuit in FM mode and the curve II represents this impedance in TV mode.

In TV mode the desired oscillation frequency occurs at the resonance peal R II (approximately 130 MHz). In this mode there is no parasitic resonance within the range of measurement between 0 and 800 MHz. In FM mode the desired oscillation frequency occurs at the resonance peak R I (approximately 100 MHz). In this mode however, also a parasitic resonance peak P I exists at approximately 375 MHz. This parasitic resonance is mainly attributed to current travelling in the loop C s1 , L 1 , R 1 . From the graph of FIG. 2 it can be seen that the impedance at this parasitic oscillation is only about 10 dB lower than that of the desired oscillation. This is too less to be sure that no parasitic oscillation at this frequency would occur.

An improved arrangement is shown in FIG. 3 . The only difference with respect to the arrangement of FIG. 1 is that the damping resistor R 1 is now replaced by a damping resistor R 1a , which is connected between the junction J 2 and ground. FIG. 4 shows the impedance-graph of the so modified arrangement with the same values as given above and with the same value for the resistor R 1a as for the resistor R 1 of FIG. 1 . The graph shows that the parasitic peak P I in FM mode is significantly reduced and also shifted away from the desired oscillation frequency (to approximately 500 MHz) so that the risk of parasitic oscillation is substantially minimized. It may also be seen that a parasitic peak P II is now present in the TV mode, however this peak has sufficiently reduced level and a sufficiently low frequency that no risk of parasitic oscillation on this peak exists.

It has to be noted that in the arrangement of FIG. 3 modifications may be made without departing from the scope of the invention. E.g. the inductor L 1 and the inductor L 2 with parallel connected C sw -C p2 combination may be interchanged. Also in the two series arrangements C v -C p1 and C sw -C p2 the components may be interchanged with proper choice of the polarity of the respective diode.

the grant prints no section headings; every part label below is ours, taken from that part's own first words

Claims as granted

1 claim

Log in to read the claims of this application.

Log in to unlock

Classifications

10 codes
IPC · International Patent Classification
Section H — Electricity
  • H04B1/18
  • H04N5/46
  • H04N5/60
  • H03J7/08
  • H04B1/26
  • H03B1/00
  • H04B1/16
  • H03B5/12
USPC · US Patent Classification
348/729348/725

Claim changes

Soon
Coming soonHow the claims changed between publication and grant

See which claims were amended, added or cancelled during examination, with every added and removed word marked.

AmendedAddedCancelledUnchanged

The published claims of this application are not paired with the granted ones in what we hold.

File wrapper

⤢ drag to zoomJul 2003Jan 2004Jul 2004Jan 2005Jul 2005Jan 2006Jul 2006Jan 2007Jul 2007Jan 2008USPTOApplicantNotice of allowance
USPTOApplicanthover for detail · click to open
Pendency
4.3 y
1,586 days filing → grant
Office actions
0
none on record
Examiner
Sherrie Hsia
art unit 2622 · TC 2600
Citations: 4 back · 1 forward

See the full prosecution history — every USPTO and applicant action on this file, in order.

Log in to unlock

Documents

Log in to open the documents of this file: the application as filed, every office action and response, the notice of allowance.

Log in to unlock

Chain of title

⤢ drag to zoom2006200820102012201420162018202020222024Owner 1Owner 2Owner 4
Titlehover for detail · click to open

See the full assignment history — every owner this patent has passed through, with recordation dates and reel/frame numbers.

Log in to unlock