USPatent applicationPatented

Testing method for extended capabilities port of printers and fixture thereof

Granted 1 Jan 2008 · 1 office action

Current assignee: INVETECH PTY LTD · originally Inventec Corporation

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Inventors: Win-Harn Liu, Zhen Wang, Chiu-Yue Duan, Jeff Song · Examiner: Douglas Q. Tran · AU 2625 · TC 2600

Life of the application

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Abstract

A method of testing the extended capabilities port of printers involves connecting D 0 ËœD 3 with 4 status signal pins, D 4 ËœD 7 to the control signal pins, and the rest of the status signal pins to one of the four connected status pins. The working conditions of data transmission of the data signal pins (D 0 ËœD 7 ), the status signal pins (ERROR, ACK, BUSY, PE, SLCT), and the control signal pins (STROBE, AUTOFD, INT, SCLTIN) are then tested.

Description

5 parts
›FIELD OF THE INVENTION

The invention pertains to method of testing a port and fixture thereof, and more specifically to a method of testing the extended capabilities port of printers and fixture thereof.

›BACKGROUND OF THE INVENTION

In most computers, the Serial Port (COM Port) and Parallel Port are used to communicate with the outside world. The Parallel Port is also used to connect printers, and it is also known as the Line Printer Port (LPT Port). The Parallel Port, which transmits 8 bits of data at a time, is much faster than the Serial Port, which only transmits 1 bit at a time. However, the Parallel Port is generally used for short distance transmission because of the need of increasing data lines. Besides, the Line Printer Port can also be used to transmit data between two computers for short distance purposes.

Generally, there are 25 pins in a printer port. 17 of them (except 8 grounds, PIN 18 ˜PIN 25) are defined as follows:

1. Input: includes 5 STATUS signal pins, ACK (PIN 10 ), BUSY (PIN 11 ), PE (PIN 12 ), SLCT (PIN 13 ), and ERROR (PIN 15 ). They are used to input STATUS signals to computers. 2. Output: includes 4 CONTROL signal pins, STROBE (PIN 1 ), AUTOFD (PIN 14 ),INT (PIN 16 ). SCLTIN (PIN 17 ). They are used to output CONTROL signals from computers. 3 . Input/Output: includes 8 data pins, D 0 (PIN 2 ), D 1 (PIN 3 ), D 2 (PIN 4 ), D 3 (PIN 5 ), D 4 (PIN 6 ), D 5 (PIN 7 ), D 6 (PIN 8 ), D 7 (PIN 9 ). They are used to receive and transmit data within computers.

With the traditional testing method there is no open circuit between input and output pins if the voltage level of the output signal of the output pin is equal to the voltage level of the input signal of the input pin. However, we can only test 10 out of 17 pins, the remaining pins are not testable. The traditional method also has the following disadvantages:

1. Short circuit between D 5 (or D 7 ) and the ground is undetectable. 2. Short circuit between any two pins between D 0 and D 7 is undetectable. 3. Short circuit between ACK and BUSY is undetectable.

Therefore, testing departments for printer ports have a variety of solutions for short circuit detection. For example, traditional testing method has a particular circuit, as in FIG. 1 . First, we check the voltage of the connected PIN 2 (D 0 ) and PIN 15 by increasing or decreasing the voltage. If the voltage levels of the two pins are the same, the data will be transmitted from PIN 2 properly. Therefore, we can test all pins by connecting PIN 15 to D 0 ˜D 7 . However, it is inefficient to test only one pin at a time, especially when we test the Extended Capabilities Port (ECP). Therefore, a solution to improve testing efficiency and simplify the testing procedure is necessary.

›SUMMARY OF THE INVENTION

Based on the problems of traditional testing, the invention provides a new testing method of extended capability port of printers , which improves testing efficiency and simplifies the testing procedure.

The method of the invention involves connecting D 0 ˜D 3 with four of the status signal pins, and connecting D 4 ˜D 7 with the control signal pins. The rest of the status signal pins will connect with one of the four connected status signal pins.

The following steps are used to check the working condition of the data signal pins (D 0 ˜D 7 ), the status signal pins (ERROR, ACK, BUSY, PE, SLCT), and the control signal pins (STROBE, AUTOFD, INT, SCLTIN):

Make the first group of D 0 ˜D 3 and second group of D 4 ˜D 7 ; make sure there is no short circuit between any pin of the first group and any pin of the second group;

Check if there is short circuit between D 0 ˜D 3 ;

Check if there is short circuit between D 4 ˜D 7 ;

Check if there is short circuit between PE and BUSY.

Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.

›BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become more fully understood from the detailed description given hereinbelow illustration only, and thus are not limitative of the present invention, and wherein:

FIG. 1 illustrates the traditional testing procedure.

FIG. 2 illustrates the circuitry of the invention.

FIG. 3 illustrates the testing flow chart of the invention.

›DETAILED DESCRIPTION OF THE INVENTION

Generally, a printer port has 25 pins, 17 of them (excluding 8 grounds, PIN 18 ˜PIN 25 ) are defined as follows (please refer to FIGS. 1 and 2 for a detailed circuit):

1. Input: includes 5 STATUS signal pins, ACK (PIN 10 ), BUSY (PIN 11 ), PE (PIN 12 ), SLCT (PIN 13 ), and ERROR (PIN 15 ). They are used to input STATUS signals into computers. 2. Output: includes 4 CONTROL signal pins STROBE (PIN 1 ), AUTOFD (PIN 14 ), INT (PIN 16 ), SCLTIN (PIN 17 ). They are used to output CONTROL signals from computers. 3. Input/Output: includes 8 DATA signal pins, D 0 (PIN 2 ), D 1 (PIN 3 ), D 2 (PIN 4 ), D 3 (PIN 5 ), D 4 (PIN 6 ), D 5 (PIN 7 ), D 6 (PIN 8 ), D 7 (PIN 9 ). They are used to receive and transmit data within computers.

The object of the invention is to test the working condition of the data signal pins, the status signal pins, and the control signal pins. The method of the invention involves connecting D 0 ˜D 3 with 4 of the status signal pins, and connecting D 4 ˜D 7 to the control signal pins. The rest of the status signal pins are connected to one of the four connected status pins. In FIG. 2 , PIN 2 (D 0 ) is connected to PIN 15 (ERROR), PIN 3 (D 1 ) is connected to PIN 13 (SLCT), PIN 4 (D 2 ) is connected to PIN 12 (PE), PIN 5 (D 3 ) is connected to PIN 10 (ACK), PIN 6 (D 4 ) is connected to PIN 1 (STROBE), PIN 7 (D 5 ) is connected to PIN 14 (AUTOFD), PIN 8 (D 6 ) is connected to PIN 16 (INT), PIN 9 (D 7 ) is connected to PIN 17 (SLCTIN), PIN 11 (BUSY) is connected to PIN 12 (PE), and Grounds (PIN 18 ˜PIN 25 ) are not connected to any pin.

Please refer to FIG. 3 for a testing flow chart. First, detect if a printer port is in ECP mode (step 31 ). Then, make D 0 ˜D 3 as a first group and D 4 ˜D 7 as a second group. Check if there is a short circuit between any pin of the first group and any pin of the second group (step 32 ). If there is no short circuit, then check if there is a short circuit between group members of each group (step 33 ˜ 34 ). Finally, check if there is a short circuit between PE and BUSY.

The technique disclosed in the invention enables a test mechanism for comparing the voltage level of input and output pins. It has the following effects:

1. It reduces the cost and quantity of features and test hours largely by using only one test feature. 2. It increases the production rate by increasing the testing coverage. 3. It tests each pin's ability to transmit data.

The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.

Claims as granted

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Classifications

7 codes
IPC · International Patent Classification
Section G — Physics
  • G06F3/00
  • G06K1/00
  • G06F15/00
USPC · US Patent Classification
358/1.15714/43714/25399/27

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File wrapper

⤢ drag to zoomJul 2003Jan 2004Jul 2004Jan 2005Jul 2005Jan 2006Jul 2006Jan 2007Jul 2007Jan 2008USPTOApplicantNon-final rejectionNotice of allowance
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Pendency
4.7 y
1,714 days filing → grant
Office actions
1
non-final + final
Responses
1
no RCE
Examiner
Douglas Q. Tran
art unit 2625 · TC 2600
Citations: 5 back · 1 forward

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Chain of title

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