Method and apparatus of compensating imbalance of a modulator
Granted 15 Aug 2006 · 1 office action
Assignee: Intel Corporation
Law firm: Law firm · Log in to unlock
Attorney: Attorney · Log in to unlock
Inventors: Nati Dinur · Examiner: Chieh M. Fan · AU 2611 · TC 2600
Life of the application
8 dated eventsAbstract
Briefly, a method and apparatus to compensate an imbalance of a modulator by providing calibration parameters to a calibration network. The modulator may receive a pair of predetermined sinusoidal in-phase and quadrature signals and output a distorted modulated signal. A processor may process spectral parameters at first and second harmonics of a detected envelope signal of the distorted modulated signal may generate the calibration parameters.
Description
5 parts›BACKGROUND OF THE INVENTION
Modulators may be used in transmitters to modulate an input signal that may comprise data and voice with a radio frequency (RF) signal. The modulated signal may be transmitted over the air. For example, types of modulators may include a quadrature modulator. A quadrature modulator may receive an in-phase signal (I) and a quadrature signal (Q) and modulate the I and Q signals with an RF signal. However, various factors related to the physical structure of the modulator, such as for example, leakage of a local oscillator, an imbalance in the amplitude and/or phase of the I and Q signals, and the like, may cause the modulator to produce a modulated signal that is distorted. Consequently, the transmit signal may also be distorted.
Thus, there is a need for better ways to provide an undistorted modulated signal.
›BRIEF DESCRIPTION OF THE DRAWINGS
The subject matter regarded as the invention is particularly pointed out and distinctly claimed in the concluding portion of the specification. The invention, however, both as to organization and method of operation, together with objects, features and advantages thereof, may best be understood by reference to the following detailed description when read with the accompanied drawings in which:
FIG. 1 is a block diagram of a transmitter, according to an embodiment of the present invention;
FIG. 2 is a schematic illustration of a calibration network helpful in understanding some embodiments of the present invention;
FIG. 3 is a flowchart of a method according to an embodiment of the present invention; and
FIG. 4 is a flowchart of a method of generating some calibration parameters according to an embodiment of the present invention.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.
›DETAILED DESCRIPTION OF THE INVENTION · 1 of 3
In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However it will be understood by those of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
Some portions of the detailed description, which follow, are presented in terms of algorithms and symbolic representations of operations on data bits or binary digital signals within a computer memory. These algorithmic descriptions and representations may be the techniques used by those skilled in the data processing arts to convey the substance of their work to others skilled in the art.
Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the specification discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining,” or the like, refer to the action and/or processes of a computer or computing system, or similar electronic computing device, that manipulate and/or transform data represented as physical, such as electronic, quantities within the computing system's registers and/or memories into other data similarly represented as physical quantities within the computing system's memories, registers or other such information storage, transmission or display devices. Furthermore, the term “envelope signal” may refer to the sun of the squares of I and Q signals and to the sum of electric powers of the I and Q signals.
It should be understood that the present invention may be used in a variety of applications. Although the present invention is not limited in this respect, the circuits and techniques disclosed herein may be used in many apparatuses such as transmitters of a radio system. Transmitters intended to be included within the scope of the present invention include, by way of example only, wireless local area network (LAN) transmitters, two-way radio transmitters, digital system transmitters, analog system transmitters, cellular radiotelephone transmitters and the like.
Types of wireless local area network (LAN) transmitters intended to be within the scope of the present invention include, although are not limited to, transmitters for transmitting spread spectrum signals such as, for example, Frequency Hopping Spread Spectrum (FHSS), Direct Sequence Spread Spectrum (DSSS) and the like.
Turning to FIG. 1 , a transmitter 100 in accordance with an embodiment of the invention is shown. The transmitter 100 may comprise an in-phase/quadrature (IQ) generator 110 , a calibration network 120 , a modulator 130 , a detector 140 , a measuring module 150 , a processor 160 , a memory 170 , a power amplifier 180 and an antenna 190 . Although it should be understood that the scope and application of the present invention is in no way limited to these examples, types of modulators that may be used with embodiments of the present invention may include quadrature modulators, direct conversion modulators, frequency conversion modulators, and the like.
In an embodiment of the present invention, transmitter 100 may transmit signals, for example, over a wireless LAN. Although the scope of the present invention is not limited in this respect, transmitter 100 may have two modes of operation. In a first mode of operation, IQ generator 110 may generate I and Q signals based on an input signal 101 . Calibration network 120 may modify the I and Q signals to produce compensated I′ and Q′ signals. Calibration network 120 may compensate for imbalance of modulator 130 . Although the scope of the present invention is not limited in this respect, imbalance of modulator 130 may be due to leakage of a local oscillator (LO), an imbalance in the amplitude and/or phase of the I and Q signals, and the like. Modulator 130 may then modulate an RF signal with the I′ and Q′ signals. The output of modulator 130 , a compensated modulated signal, may be amplified by power amplifier 180 and then transmitted through antenna 190 , if desired. Although the scope of the present invention is not limited in this respect, antenna 190 may be a dipole antenna, a shot antenna, a printed antenna, and the like.
Although the scope of the present invention is not limited in this respect, in a second operation mode of transmitter 100 , which may be described as a calibration mode of transmitter 100 , processor 160 may provide input to IQ generator 110 . IQ generator 110 may generate I and Q signals according to these inputs, if desired. In this operation mode, the I and Q signals may be used as calibration signals. Although the scope of the present invention is not limited in this respect, calibration signals may be signals that include predetermined characteristics that when modulated by a modulator may generate certain spectral parameters in the modulated signal. Furthermore, the spectral parameters may be used to generate calibration parameters, if desired. The calibration parameters may compensate for the imbalance of modulator 130 .
Although the scope of the present invention is not limited in this respect, calibration signals I and Q may be inputted to calibration network 120 . Calibration network 120 may manipulate calibration signals I and Q with calibration parameters, and may output compensated signals I′ and Q′. Compensated signals I′ and Q′ may be inputted to modulator 130 . A detailed description of an example of calibration network 120 will be provided with reference to FIG. 2 .
Although the scope of the present invention is not limited in this respect, modulator 130 may receive a pair of calibration signals I′ and Q′ and provide a distorted modulated signal s(t).
Although the scope of the present invention is not limited to this respect, an example of the distorted modulated signal s(t) may be provided by equation 1.
s ( t )= I ( t )·cos(ω 0 t )− Q ( t )· A sin(ω 0 t +φ)+ J cos(ω 0 t +φ 1 ) Eq. 1
›DETAILED DESCRIPTION OF THE INVENTION · 2 of 3
wherein in this particular example:
I(t) is the in-phase component of the distorted modulated signal; ω 0 is the frequency of the RF signal; Q(t) is the quadrature component of the distorted modulated signal; A is the amplitude mismatch; φ, φ 1 are the phase error; and J is the amplitude of LO leakage.
Although the scope of the present invention is not limited in this respect, detector 140 may detect an envelope of the distorted modulated signal s(t) and may provide an envelope signal k(t), if desired. Detector 140 may be, for example, an envelope detector such as a diode, a transistor, or the like. In addition, measuring module 150 may receive the distorted modulated signal s(t) and the envelope signal k(t). Measuring module 150 may measure a spectral parameter at a first harmonic of the envelope signal k(t). Although the scope of the present invention is not limited in this respect, the spectral parameter may be an amplitude value of a Fourier series, as is known to one skilled in the art. Furthermore, measuring module 150 may measure a spectral parameter at a second harmonic of the envelope signal k(t), if desired. In addition, the spectral parameter measured at the second harmonic of k(t) may be equivalent to an electric power of the signal s(t). Although the scope of the present invention is not limited to this example, measuring module 150 may be an analog to digital converter, a digital processor, an analog computer, and the like.
Although the scope of the present invention is not limited in this respect, processor 160 may receive the measurement from measuring module 150 and may generate calibration parameters accordingly. Although the scope of the present invention is not limited in this respect, processor 160 may be a digital signal processor (DSP), a reduced instruction set computer (RISC) processor, a microprocessor, a micro-controller, a custom integrated circuit to perform a predefined algorithm and/or method and the like. Furthermore, processor 160 may use methods and/or algorithms to generate the calibration parameters. Detailed examples of such algorithms will be provided with reference to FIGS. 3 and 4 . In addition, processor 160 may use memory 170 to receive and store calibration parameters, coefficients that may be used in calculations, and the like.
Although the scope of the present invention is not limited in tis respect, memories that may be used with the present invention such as, for example memory 170 , may be a register, a flip-flop, a Flash memory, a random access memory (RAM), dynamic RAM (DRAM), static RAM (SRAM) and the like. Furthermore, memory 170 may be used to provide the calibration parameters to calibration network 120 .
Turning to FIG. 2 , an exemplary embodiment of calibration network 120 is shown. Although the scope of the present invention is not limited in this respect, calibration network 120 may include an in-phase (I) module 210 and a quadrature module 250 . More particularly, I module 210 may include an adder 215 and calibration parameters DC I and a c . Q module 250 may include an adder 265 and calibration parameters DC Q and a s . For example, in one embodiment of the present invention, calibration parameters DC I and DC Q may compensate an imbalance that may be generated as result of a leakage of a local oscillator of modulator 130 and/or by a DC offset, calibration parameter a s may compensate an imbalance of amplitude of the I signal and Q signal at modulator 130 , and calibration parameter a c may compensate an imbalance of phase at I signal and Q signal at modulator 130 , if desired.
In operation, I module 210 may provide a signal 122 which includes the calibration parameters DC I and a c . Adder 215 may add calibration parameters DC I and a c to I signal 102 and output signal 122 . Signal 122 may compensate an imbalance of an I branch (not shown) at modulator 130 . In addition, Q module 250 may provide a signal 124 which includes calibration parameters DC Q and a s . Adder 265 may add calibration parameters DC Q and a s to Q signal 104 and output signal 124 . Signal 124 may compensate an imbalance of a Q branch (not shown) at modulator 130 . However, in alternative embodiments of the present invention, other calibration networks may be used, if desired. For example, the a s calibration may be performed by the I module and the a c calibration may be performed by the Q module.
Turning to FIG. 3 , a flow chart of a method for compensating an imbalance of modulator 130 is shown. Although the scope of the present invention is not limited in this respect, the method may begin with initializing the calibration parameters, for example, a c =0, a s =1, DC I =0 and DC Q =0 (block 300 ). The method may proceed with providing a pair of calibration signals, for example I and Q signals 102 and 104 , respectively, to modulator 130 (block 310 ). For example, the modulator 130 may receive, through the calibration network 120 , the following three pairs of signals, where δ is a direct current (DC) constant. The first pair may be I=δ+cos(ω 1 t), Q=δ+sin(ω 1 t); the second pair may be I=−δ+cos(ω 1 t), Q=δ+sin(ω 1 t); and the third pair may be I=−δ+cos(ω 1 t), Q=−δ+sin(ω 1 t). Measuring module 150 may correlate the envelope signal k(t) with cos(ω 1 t) to yield coefficients y 1 , y 2 , y 3 , and with sin(ω 1 t) to yield coefficients y 4 , y 5 , y 6 . Although, the scope of the present invention is not limited in this respect coefficients, y 1 , y 2 , y 3 , y 4 , y 5 , y 6 may be, for example, the spectral parameters discussed above with reference to FIG. 1 . Processor may store the y 1 –y 6 coefficients at memory 170 , and may use the y 1 –y 6 coefficients to generate a first set of calibration parameters (block 320 ). Although the scope of the present invention is not limited in this respect, the first set of parameters may be DC I and DC Q and the second set of calibration parameters may be a s and a c . Processor 160 may use the flowing equations to generate DC I and DC Q :
›DETAILED DESCRIPTION OF THE INVENTION · 3 of 3
D C I = D C I old + ( y 2 - y 3 ) ( y 4 + y 6 ) - ( y 5 - y 6 ) ( y 1 + y 3 ) ( y 5 - y 6 ) ( y 1 - y 2 ) - ( y 2 - y 3 ) ( y 4 + y 5 ) δ D C Q = D C Q old + ( y 1 - y 2 ) ( y 4 + y 6 ) - ( y 4 - y 5 ) ( y 1 + y 3 ) - ( y 5 - y 6 ) ( y 1 - y 2 ) + ( y 2 - y 3 ) ( y 4 + y 5 ) δ
wherein DC I old and DC Q old may be previous calculated or set values. Measuring module 150 may measure a value of a spectral parameter (SP) at a first harmonic of the envelope signal k(t) (block 330 ). Processor 160 may regenerate DC I and DC Q if the value of SP is above zero (block 350 ). In alternative embodiments of the present invention, DC I and DC Q may also be regenerated when SP is above zero.
Although the scope of the present invention is not limited in this respect, the method may proceed with measuring a value of SP at a second harmonic of the envelope signal k(t) (block 360 ) and generating a second set of calibration parameters, for example a c and a s (block 380 ). It should be appreciated by one skilled in the art that the value of SP at the second harmonic may be proportional to an electric power of s(t). A detailed example of a method of generating a s and a c will now be described with reference to FIG. 4
Turning to FIG. 4 , the method may begin with setting initial mean values to a s and a c , for example ā c =0 and ā s =1 (block 400 ). Initial values for DC I and DC Q may be provided from processor 160 . The method may proceed with updating ā c . The algorithm of updating ā c may begin with adding a distortion value δ to ā c , sending I and Q signals with substantially the same signal (sin ω 1 t) and measuring the electric power of s(t), namely, P 1 (block 410 ). Although, the scope of the present invention is not limited in this respect, measuring of the electric power may be done by processing envelope signal k(t) and calculating P 1 according to the following equation p=∫k(t). For example, processing the envelope k(t) and calculating P 1 value, may be done by processor 160 or measuring module 150 . However, in alternative embodiment of the present invention the processing and calculating may be done by different processors or by different hardware or software modules, if desired. In addition, in some embodiments of the present invention the calculation of P 1 may be performed according to the equation: P1=√{square root over ((∫k(t)cos(2 ω 1 t)) 2 +(∫k(t)sin(2ω 1 t)) 2 )}{square root over ((∫k(t)cos(2 ω 1 t)) 2 +(∫k(t)sin(2ω 1 t)) 2 )}{square root over ((∫k(t)cos(2 ω 1 t)) 2 +(∫k(t)sin(2ω 1 t)) 2 )}{square root over ((∫k(t)cos(2 ω 1 t)) 2 +(∫k(t)sin(2ω 1 t)) 2 )}. Furthermore, the integrals in both equations may be taken over a constant multiple of ω 1 period. The method may proceed with sending opposite I and Q signals, for example, sin ω 1 t, −sin ω 1 t respectively, measuring the electric power of s(t) P 2 , and calculating dP 1 =P 1 −P 2 (block 420 ). As shown in blocks 430 and 440 , the operation of blocks 410 and 420 may be repeated with a negative distortion value of δ. In addition, dP 2 may be provided by dP 2 =P 1 −P 2 . The algorithm of updating ā c may end by calculating ā c using the following equation:
a _ c = a _ c old - ⅆ P 1 + ⅆ P 2 ⅆ P 1 - ⅆ P 2 δ ,
wherein ā c old may be a previously calculated value of ā c .
Although the scope of the present invention is not limited in this respect, an algorithm for updating ā s is shown at blocks 460 , 470 , 480 , 490 and 500 . The algorithm for updating ā s may begin with adding distortion value δ to ā s , sending I and Q signals with different amplitudes, for example, sin ω 1 t, 0.125 cos ω 1 t and measuring the electric power of s(t), namely, P 1 (block 460 ). The method may proceed with sending I and Q signals with different amplitudes, for example, 0.125 sin ω 1 t, cos ω 1 t respectively, measuring the electric power of s(t) P 2 , and calculating dP 1 =P 1 −P 2 (block 470 ). As shown in blocks 480 and 490 , the operation of blocks 460 and 470 may be repeated with a negative distortion value of δ. In addition, the value for dP 2 may be calculated by dP 2 =P 1 −P 2 . The algorithm of updating ā s may end with calculating ā s using the following equation:
a _ s = a _ s old - ⅆ P 3 + ⅆ P 4 ⅆ P 3 - ⅆ P 4 δ + δ 2 2 ,
wherein ā s old may be a previous value of ā s . Although the scope of the present invention is not limited in this respect, the values of ā c and ā s may be updated repeatedly until dP 1 and dP 2 are substantially equal to zero, if desired.
Although the scope of the present invention is not limited in this respect, calibration parameters DC I , DC Q , a c and a s may be set to transmitter 100 after the calibration processes described above have been completed. Thus, transmitter 100 may transmit undistorted modulated signal.
While certain features of the invention have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
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5 codes- H03C3/40
- H04L27/36
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