Method and system for reducing parasitic feedback and parasitic resonances in high-gain transimpedance amplifiers
Granted 6 Jun 2006 · 2 office actions
Current assignee: MARVELL ASIA PTE, LTD. · originally Marvell Technology Group Ltd.
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Attorney: Attorney · Log in to unlock
Inventors: Tom Peter Edward Broekaert, Marian Pospieszalski · Examiner: Linh My Nguyen · AU 2816 · TC 2800
Life of the application
12 dated eventsAbstract
Method and system for reducing parasitic feedback and resonances in high-gain transimpedance amplifiers. In a first embodiment of the present invention, a resistive layer is implemented in the gaps of a high-gain transimpedance amplifier\'s metallic planes. In a second embodiment of the present invention, a resistive layer is implemented underneath a high-gain transimpedance amplifier\'s ground plane, vias are implemented to create contact between the resistive layer and the ground plane.
Description
4 parts›BACKGROUND INFORMATION
1. Field of Invention
The present invention relates to transimpedance amplifiers, and more particularly, to high-gain transimpedance amplifiers with reduced parasitic feedback and resonances.
2. Description of Related Art
A transimpedance amplifier is used to convert an input current to a proportional output voltage. A typical transimpedance amplifier comprises: an input current that is supplied through a transistor input stage, the input current is typically produced by a photodiode; an output carrying an output voltage; and a coupling member connecting the input to the output. Furthermore, the input current may be small, such as 1 μA, or comparatively large, such as 1 mA.
Typical uses of transimpedance amplifiers include summing currents as part of a frequency impulse response filter or processing reverse current produced by a photodiode as function of infrared signal energy received by the photodiode.
FIG. 1A illustrates a layout diagram 100 of a conventional high-gain transimpedance amplifier. Layout diagram 100 comprises: a power plane denoted 1 ; a group of one or more capacitors such as the block illustrated in diagram 100 denoted as 3 ; a group of one or more transistors such as the circuitry illustrated in diagram 100 denoted as 4 ; and a group of one or more pads such as the block illustrated in diagram 100 denoted as 5 , wherein the group of one or more pads connecting power plane 1 to components adjacent to the amplifier.
However, conventional transimpedance amplifiers are composed almost entirely of metallic structures comprising material such as gold, aluminum, or copper. Therefore, use of resistive materials is restricted to resistors only. Such metallic geometries in layout and packaging may form parasitic feedback paths and resonances that may turn a high-gain transimpedance amplifier into an oscillator.
According, there is a need to include resistive layers in transimpedance amplifiers in order to reduce parasitic feedback and resonances.
›SUMMARY OF THE INVENTION
The present invention provides a method and system for reducing parasitic feedback and resonances in high-gain transimpedance amplifiers.
In a first embodiment of the present invention, a layer of resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material is added in the gaps of a high-gain transimpedance amplifier's metal ground plane in order to reduce parasitic feedback and resonances.
In a second embodiment of the present invention, a layer of resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material is added below a high-gain transimpedance amplifier's metal ground plane, along with vias for contacting the resistive layer to the metal ground plane.
›BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings that are incorporated in and form a part of this specification illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention:
FIG. 1A is a layout diagram illustrating a conventional transimpedance amplifier.
FIG. 1B is a layout diagram illustrating a transimpedance amplifier according to one embodiment of the present invention.
FIG. 2 is a diagram illustrating a sectional view of a transimpedance amplifier in accordance to one embodiment of the present invention, wherein a layer of resistive material is implemented in a gap on the metal ground plane of the amplifier.
FIG. 3 is a diagram illustrating a section view for a transimpedance amplifier in accordance to one embodiment of the present invention, wherein a layer of resistive material is implemented below the metal ground plane of the amplifier.
FIG. 4A is a graph illustrating the frequency response of an oscillating transimpedance amplifier without reduced parasitic feedback and resonances.
FIG. 4B is a graph illustrating the frequency response of a transimpedance amplifier in accordance to one embodiment of the present invention.
›DETAILED DESCRIPTION
The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. In the following description, specific nomenclature is set forth to provide a thorough understanding of the present invention. It will be apparent to one skilled in the art that the specific details may not be necessary to practice the present invention. Furthermore, various modifications to the embodiments will be readily apparent to those skilled in the art and the generic principles herein may be applied to other embodiments. Thus, the present invention is not intended to be limited to the embodiments shown but is to be accorded the widest scope consistent with the principles and features described herein.
FIG. 1B illustrates a schematic diagram 200 of a high-gain transimpedance amplifier in accordance to one embodiment of the present invention. Schematic diagram 200 comprises: a ground plane denoted 6 ; a group of one or more capacitors such as the block illustrated in diagram 200 denoted as 8 ; a group of one or more transistors such as the circuitry illustrated in diagram 200 denoted as 10 ; a group of one or more pads such as the block illustrated in diagram 200 denoted as 12 , wherein the group of one or more pads connecting ground plane 6 to components adjacent to the amplifier; a layer comprising resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material such as the blocks illustrated in diagram 200 denoted as 7 , 9 , 11 , 13 , 14 , 18 , 20 , 24 , 26 , 28 , 30 , 32 , 34 and 36 ; and a group of one or more vias on each resistive pads such as the via illustrated in diagram 200 denoted 15 .
The resistive layer illustrated in the transimpedance amplifier of FIG. 11B allows the amplifier to possibly reduce parasitic feedback and dampen parasitic resonances. Moreover, the resistive layer is constructed in the ground plane of the amplifier and does not alter the design of the amplifier elsewhere.
Furthermore, the resistive layer is typically added with a direct current (DC) contact to the ground plane. The group of one or more vias illustrated in diagram 200 provide such a contact between the resistive layer and the ground plane.
FIG. 2 illustrates a sectional view of a high-gain transimpedance amplifier 200 in accordance to one embodiment of the present invention. Transimpedance amplifier 200 comprises: a ground plane comprising a first layer of metallic (e.g. gold, aluminum, copper, etc.) material denoted 15 and a second layer of metallic (e.g. gold, aluminum, copper, etc.) material denoted 16 ; a layer of resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material denoted 17 ; and a layer of dielectric denoted 19 .
As shown in FIG. 2 , the layer of metallic material 15 lies adjacent to the layer of metallic material 16 , the two layers lie parallel on the same plane, and an electric disconnect or gap lies between the layer of metallic material 15 and the layer of metallic material 16 . Moreover, the layer of resistive material 17 lies in the brake between the first metallic material 15 and the second metallic material 16 .
Furthermore, as shown in FIG. 2 , the layer of resistive materials in FIG. 2 makes direct contact with the ground plane in order to reduce parasitic feedback and dampen parasitic resonances.
FIG. 3 illustrates a sectional view of a high-gain transimpedance amplifier 300 in accordance to a second embodiment of the present invention. Transimpedance amplifier 300 comprises: a ground plane comprising a first layer of metallic (e.g. gold, aluminum, copper, etc.) material denoted 21 and a second layer of metallic (e.g. gold, aluminum, copper, etc.) material denoted 22 ; a first group of one or more vias denoted 23 ; a second group of vias denoted 25 ; a layer of resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material denoted 27 ; and a layer of dielectric denoted 29 .
As shown in FIG. 3 , the layer of resistive material 27 lies directly atop the layer of dielectric 29 . The first group of one or more vias 23 and the second of one or more vias 25 are implemented on top of the layer of resistive material 27 . Moreover, the first layer of metallic material 21 lies directly atop the first group of one or more vias 23 , and the second layer of metallic materials 23 lies directly atop the second group of one or more vias 25 .
Furthermore, as shown in FIG. 3 , the layer of resistive material makes contact with the ground plane via the first and the second groups of one or more vias, and the layer of resistive material reduces parasitic feedback and dampens parasitic resonances.
FIG. 4A illustrates a transimpedance gain vs. frequency graph 500 for a conventional transimpedance amplifier without a layer comprising resistive material. The step denoted 27 in FIG. 4A illustrates a condition caused by an oscillation owing to parasitic feedback and resonance.
FIG. 4B illustrates transimpedance gain vs. frequency graph 600 for a transimpedance amplifier in accordance to one embodiment of the present invention. A layer of resistive (e.g. Tantalum-Nitride, Nickel-Chrome, etc.) material is built into the amplifier that reduces parasitic feedback and resonances, thereby eliminating the oscillation condition illustrated in FIG. 4A .
Although the invention has been described in connection with several embodiments, it is understood that this invention is not limited to the embodiments disclosed, but is capable of various modifications that would be apparent to a person skilled in the art.
For example, although the resistive layer is described as typically added with a DC contact to the ground plane, a floating (i.e. no DC contact) resistive layer may be added as well.
The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the arts to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
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