Modulation system for modulating data onto a carrier signal with offsets to compensate for doppler effect and allow a frequency synthesizing system to make steps equal to channel bandwidth

The present invention relates to the field of signal modulation. More particularly, the present invention relates to the field of two-way satellite communication systems in which modulated signals carry data.

The K a -band of the electromagnetic spectrum is the radio frequency band between about 17 and 36 GHz. This upper portion of the microwave range is used primarily for satellite communication. Many two-way satellite communication systems transmit and receive data in the K a -band. However, other two-way satellite communication systems transmit and receive data in various other bands such as the C-band (3.7–6.4 GHz) and the K u -band (11–15 GHz), for example. Future systems may use higher frequencies (e.g., 60 GHz).

Modulation and upconversion are essential methods used in wireless communication systems, including two-way satellite communication systems. Upconversion is the translation of a signal's frequency from baseband, or the original frequency before modulation, to a higher frequency. The signal is then transmitted at this higher frequency. Upconversion is done because most antennas can only receive signals that have short wavelengths. Frequency is the inverse of wavelength. Therefore, the higher the frequency a signal has, the shorter its wavelength.

Modulation is a method used to transmit and receive digital signals. By varying the phase of the transmitted signal, for example, information can be conveyed. This type of modulation is called phase-shift keying (PSK). There are several schemes that can be used to accomplish PSK. The simplest method uses only two signal phases: 0 degrees and 180 degrees. The digital signal is broken up time wise into individual bits (binary digits—zeros and ones). The state of each bit is determined according to the state of the preceding bit. If the phase of the wave does not change, then the signal state stays the same (low or high). If the phase of the wave changes by 180 degrees—that is, if the phase reverses—then the signal state changes (from low to high, or from high to low). Because there are two possible wave phases, this form of PSK is sometimes called Binary Phase Shift Keying (BPSK).

A more complex form of PSK is called Quadrature Phase Shift Keying (QPSK). QPSK modulation employs four wave phases and allows binary data to be transmitted at a faster rate per phase change than is possible with BPSK modulation. In QPSK modulation, the signal to be transmitted is first separated into two signals: the In-phase (I) signal and the Quadrature (Q) signal. The I and Q signals are orthogonal, or 90 degrees out of phase. Thus, they are totally independent and do not interfere with each other. Each signal can then be phase shifted independently. Both the I and Q signals have two possible phase states. Combining the possible states for the I and Q signals results in four total possible states. Each state can then represent two bits. Thus, twice the information can be conveyed using QPSK modulation instead of BPSK modulation. For this reason, QPSK modulation is used in many two-way satellite communication systems.

For any two-way satellite communication system using a QPSK modulator and upconverter, there are a number of competing design goals. First, the system should have low phase noise. Phase noise is a result of rapid, short-term, random fluctuations in the phase of a wave and is caused by instabilities found in oscillators.

Low levels of spurious emissions (also called spurious noise) are also desirable. Spurious emissions are emissions on a frequency or frequencies which are outside the necessary bandwidth of the transmitting signal, but still within the band. These emissions may be reduced without affecting the corresponding transmission of information. Spurious emissions include intermodulation distortion and harmonic distortion. Intermodulation distortion is a result of emissions on the sum and difference frequencies of the fundamental frequencies of the transmitted signal. Harmonic distortion is a result of emissions on frequencies that are not present in the input signal. Both distortions are caused by nonlinearities in the devices used to modulate the signals.

Another design goal is that there should also be a large frequency hopping range. Frequency hopping is a modulation technique that involves the repeated switching of frequencies during transmission. Frequency synthesizers generate the frequencies that are to be hopped to. A small frequency settling time, or the time it takes for the frequency synthesizer to lock into the new frequency, is also desirable. In the case of an example K a -band two-way satellite communication system, there are four 125 MHz bands over which the frequency synthesizer must operate. Each band is partitioned into a number of channels. In one example, a class A two-way satellite communication system is defined to have 175 channels per band. In another example, a class B two-way satellite communication system is defined to have 35 channels per band. The frequency synthesizer must preferably be able to hop to the center frequency of each channel within a few nanoseconds.

A very fine frequency accuracy and step size is preferably required to compensate for, or correct, the Doppler effect. The Doppler effect refers to the phenomenon of a signal's frequency being affected by the relative motion of the transmitter and receiver. When the signal source is approaching the observer, for example, the signal's frequency increases. Because satellites are constantly moving, the modulator and upconverter must preferably compensate for the Doppler effect. The Doppler frequency may range from −160 Hz to +160 Hz in two-way geostationary satellite communication.

Finally, there should be small amplitude and group delay variation across the hopping band. Amplitude variation happens when the signal has different amplitudes across the band. Group delay is the rate of change of the total phase shift with respect to angular frequency through a transmission medium. It is desirable to maintain both a constant amplitude and group delay across the hopping band.

Currently, the K a -band upconversion entails a multi-stage conversion process. First, baseband QPSK I,Q streams are modulated and then upconverted to an Intermediate Frequency (IF) in the L-band range (e.g., 1.7–2.2 GHz). This conversion is performed by in an Indoor Unit (IDU). The signal is then upconverted again and amplified to 29.5 to 30.0 GHz in an Outdoor Unit (ODU) located at the terminal's antenna. The upconversion is then complete and the signal is ready for transmission. To meet frequency accuracy requirements, the Local Oscillators (LO's) in all the upconversion stages can be phase locked to a single reference (e.g., a reference locked to the stable satellite payload oscillator available in the satellite downlink signal).

The IDU and the ODU are connected via some type of cable, for example RG-6. This type of cable performs well and has relatively small losses (10–15 dB per 100 feet) at frequencies of 1.7–2.2 GHz. In addition, RG-6 cable is easy to procure because this IF range is a common range used currently with digital satellite television set-tops. Thus, there are many RG-6 suppliers. However, other kinds of cables could also possibly be used to connect the IDU and the ODU.

Because of the various competing design goals mentioned above, there are many tradeoffs that are made in the IDU modulator and IF upconverter design. For example, single analog upconversion from baseband to IF can achieve low spurious and phase noise, large hopping range, and small amplitude and delay variation. However, these gains are achieved at the expense of a large frequency settling time and large step sizes. Direct-Digital Synthesis (DDS) can be used in these analog synthesizers to improve settling time and decrease step size but can require costly filtering to achieve low spurious noise. Heterodyne architectures (e.g., double analog upconverters) can be used to reduce the spurious noise. However, such architectures require complex analog bandpass filtering that risks increasing amplitude and group delay variation.

An alternate approach to meet the design goals above is to use an all-digital upconverter to accomplish the upconversion from baseband to IF. This, however, forces the Digital-to-Analog Converter (DAC) to operate at a very high sampling rate (e.g., greater than 1.7–2.2 GHz). DACs that operate at these high sample rates are currently difficult to design and are not cost-effective for most applications.

Digital upconversion can be used in conjunction with analog IF upconversion to achieve fast hopping and small step size over a limited bandwidth. Digital process technologies (CMOS) enable current designs of Numerically Control Oscillators (NCOs) to economically run at 200–400 MHz clock frequencies to achieve frequency hopping bandwidths of 50–100 MHz. When combined with analog upconversion, however, there can be serious spurious emission problems. For example, a digital I/Q upconversion to a center frequency of f d =10 MHz requiring analog upconversion to 1.7 GHz utilizes an analog LO of f VCO,IF =1.71 GHz or 1.69 GHz. DAC and analog mixer nonlinearities and unbalances induce spurious noise (intermodulation distortion) at IF at frequencies of ±nf VCO,IF ±mf d for integers m and n. It is difficult to sufficiently filter (reject) intermodulation products at multiples of 10 MHz from the desired carrier frequency.

Another problem with using digital upconversion in conjunction with analog IF upconversion has to do with the compensation of the Doppler effect. A prior solution included compensating for the Doppler effect in the analog IF upconversion stage by slightly varying f VCO,IF . This is difficult and costly because Doppler compensation requires very fine frequency accuracy and very fine step size. Varying f VCO,IF also induces spurious noise at frequencies in adjacent channels. Adjacent Channel Emissions (ACE) specifications are stringent at large offsets from the desired carrier frequency and more lenient close to the signal bandwidth. Thus, the increased spurious noise in adjacent channels due to Doppler compensation in the analog IF upconversion stage results in additional necessary filtering that is difficult and expensive. Thus, in a combined digital/analog modulator and upconverter used in the IDU, there is a need in the art for a method and system that compensate for the Doppler effect while avoiding out of channel spurious noise and not requiring an analog IF frequency synthesizer with very fine frequency accuracy and very fine step size.

In between each of the four 125 MHz bands, there is a guard band. A guard band is a frequency band that is deliberately left vacant between two bands to provide a margin of safety against mutual interference. In many two-way satellite communication systems, the guard band's width is not a multiple of the channel widths. This poses a problem in the design of the analog IF frequency synthesizer. In tuning to a particular channel in one band and then hopping to a different channel in another band, the frequency synthesizer skips over the guard band. A traditional frequency synthesizer needs a small step size (e.g., 2.5 kHz) to accomplish this. This results in an undesirably high phase noise. Thus, in a digital combined with analog modulator and upconverter used in the IDU, there is a need in the art for a method and system that allow an analog IF frequency synthesizer to tune to different channels while skipping over the guard bands with a large enough step size that will maintain the phase noise within acceptable levels.

As used hereafter and in the appended claims, the term “two-way satellite communication systems” will be used to refer expansively to all possible two-way satellite communication systems and other wireless communication applications in any band where frequency hopping with or without Doppler compensation is desired.

In one of many possible embodiments, the present invention provides a modulation system for modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The system preferably includes a digital modulator that outputs a modulated baseband signal, an intermediate frequency modulator that receives the modulated baseband signal and outputs an intermediate frequency signal derived from the modulated baseband signal, a frequency synthesizing system that outputs a synthesized intermediate frequency signal to the intermediate frequency modulator, and a circuit connected to the digital modulator which provides a signal to the digital modulator. The signal has a frequency including an offset that allows the frequency synthesizing system and intermediate frequency modulator to make frequency steps equal to the channel bandwidth.

In another embodiment, the present invention provides a modulation system for modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The system preferably includes a digital modulator that outputs a modulated baseband signal, an intermediate frequency modulator that receives the modulated baseband signal and outputs an intermediate frequency signal derived from the modulated baseband signal, a frequency synthesizing system that outputs a synthesized intermediate frequency signal to the intermediate frequency modulator; and a circuit connected to the digital modulator which provides a signal to the digital modulator. The signal has a frequency including an offset that compensates for Doppler effect in transmission of the carrier signal.

In another embodiment, the present invention provides a method for modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The method preferably comprises providing a signal to a digital modulator that modulates a baseband signal. The signal has a frequency that includes an offset that allows a frequency synthesizing system and intermediate frequency modulator to make frequency steps equal to the channel bandwidth.

In another embodiment, the present invention provides a method of modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The method preferably comprises providing a signal to a digital modulator that modulates a baseband signal. The signal has a frequency that includes an offset that compensates for Doppler effect in transmission of the carrier signal.

Another embodiment of the present invention provides a system for modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The system comprises a digital modulator that outputs a modulated baseband signal, an intermediate frequency modulator that receives the modulated baseband signal and outputs an intermediate frequency signal derived from the modulated baseband signal, a frequency synthesizing system that outputs a synthesized intermediate frequency signal to the intermediate frequency modulator, and a means for generating a signal input to the digital modulator, the signal having a frequency including an offset that allows the frequency synthesizing system and the intermediate frequency modulator to make frequency steps equal to the channel bandwidth.

Another embodiment of the present invention provides a system for modulating data onto a carrier signal in a plurality of channels, each of the channels having a channel bandwidth. The system comprises a digital modulator that outputs a modulated baseband signal, an intermediate frequency modulator that receives the modulated baseband signal and outputs an intermediate frequency signal derived from the modulated baseband signal, a frequency synthesizing system that outputs a synthesized intermediate frequency signal to the intermediate frequency modulator, and a means for generating a signal input to the digital modulator, the signal having a frequency including an offset that compensates for Doppler effect in transmission of the carrier signal.

Additional advantages and novel features of the invention will be set forth in the description which follows or may be learned by those skilled in the art through reading these materials or practicing the invention. The advantages of the invention may be achieved through the means recited in the attached claims.

The accompanying drawings illustrate preferred embodiments of the present invention and are a part of the specification. Together with the following description, the drawings demonstrate and explain the principles of the present invention. The illustrated embodiments are examples of the present invention and do not limit the scope of the invention.

FIG. 1 is a basic block diagram of a multi-stage modulator and upconverter that is used in a two-way satellite communication system and that could be used to implement the present invention.

FIG. 2 is a detailed block diagram of a digital modulator and a IF modulator with which the present invention could be practiced.

FIG. 3 illustrates a configuration whereby a numerically controlled oscillator (NCO) generates a frequency offset near baseband that allows for a large frequency step size for the frequency synthesizers and corrects the Doppler effect according to an embodiment of the present invention.

FIG. 4 shows the specific components of the frequency synthesizers that could be used to implement the present invention.

FIG. 5 shows the divisions of the frequency bands which are used by two-way satellite communication systems.

FIG. 6 shows the frequency spectrum of a transmitted signal and its associated spurious noise in an exemplary two-way satellite communication system under the embodiments of the present invention.

FIG. 7 shows the frequency spectrum of a transmitted signal and its associated spurious noise in an exemplary two-way satellite communication system where the embodiments of the present invention are not used.

Throughout the drawings, identical reference numbers designate similar, though not necessarily identical, elements.

The present invention provides a method and system whereby a very fast tuning QPSK modulator and upconverter can be used in two-way satellite communication systems to transmit data while meeting the typical two-way satellite communication system design goals of low phase noise, low spurious emissions levels, large frequency hopping range, small frequency settling time, fine frequency accuracy and step size to correct the Doppler effect, and small amplitude and group delay variation across the hopping band. Such design goals could apply to any and all two-way satellite communication systems as well as to other applications where cost-effective wireless communication is desired using the K a -band. The present invention, therefore, applies to any and all two-way satellite communication systems as well as to other applications where wireless communication is desired using the K a -band.

Additionally, the present invention provides a method and system of correcting the Doppler effect without introducing out-of-channel spurious emission levels that exceed Adjacent Channel Emissions (ACE) specifications. Under the principles of the present invention, as will be explained in more detail below in connections with FIG. 3 , the Doppler effect is corrected by slightly varying the frequency produced by the Numerically Controlled Oscillator (NCO) in the digital upconversion stage.

The present invention also provides a method and system of generating a large analog IF frequency synthesizer step size so that the phase noise is low and within the deemed acceptable levels as specified by wireless communication regulatory bodies. Under the principles of the present invention, as will be explained in more detail below, an offset is generated by the NCO in the digital upconversion stage that allows the analog IF frequency synthesizer step size to be large. This offset is combined with the frequency offset required to correct the Doppler effect into one frequency offset.

Using the drawings, the preferred embodiments of the present invention will now be explained.

FIG. 1 is a basic block diagram of a multi-stage modulator and upconverter that is used in a two-way satellite communication system and that could be used to implement the present invention. Baseband QPSK I ( 101 ) and Q ( 102 ) signals are modulated and upconverted to an intermediate frequency (IF), f IF , in the IDU ( 100 ). This modulation and upconversion is done in two stages within the IDU ( 100 ). First, the I ( 101 ) and Q ( 102 ) signals are modulated digitally with a digital modulator ( 103 ). A more detailed description of the digital modulator ( 103 ) will be given below in connection with FIG. 2 . The digital modulator ( 103 ) upconverts the I ( 101 ) and Q ( 102 ) signals from baseband to a frequency, f d . This frequency, f d , is preferably much lower than both the transmitted signal channel bandwidth and the IF, f IF . An example of a possible, but not exclusive, value for f d is less than 10–20 percent of the transmitted signal channel bandwidth. This key constraint on f d eases many aspects of the upconverter and synthesizer designs as will be described below in more detail in connection with FIG. 6 . The output signals of the digital modulator ( 103 ) each contain modulated I ( 101 ) and Q ( 102 ) signals. As explained before, the I ( 101 ) and Q ( 102 ) signals are orthogonal, or 90 degrees out of phase. Thus, they are totally independent and can be combined into one signal and then later separated without the loss of information

The resulting two output signals of the digital modulator ( 103 ) are then converted from digital signals to analog signals. This conversion is done using a Dual DAC ( 104 ). Because the digital to analog conversion is done at a relatively low frequency, the Dual DAC ( 104 ) can be easily designed and is cost-effective for most applications.

If, on the other hand, a digital modulator ( 102 ) is used without the analog IF modulator ( 105 ) (i.e. the IF modulator block ( 105 ) is removed from the block diagram of FIG. 1 ) to upconvert to the IF, f IF , the conversion from digital to analog would need to take place at a much higher frequency (e.g., 1.7–2.2 GHz). This would result in the Dual DAC ( 104 ) having to operate at this higher frequency of 1.7–2.2 GHz. Currently, such Dual DAC's ( 104 ) are difficult and costly to design and produce.

Once the two output signals of the digital modulator ( 103 ) have been converted from digital signals to analog signals with the Dual DAC ( 104 ), they are again modulated, this time with an analog IF modulator ( 105 ). A more detailed description of the IF modulator ( 105 ) will be given below in connection with FIG. 2 . The IF modulator ( 105 ) modulates the two output signals of the digital modulator ( 103 ) and then combines the two signals into one signal. This combined signal is upconverted by the IF modulator ( 105 ) from the frequency, f d , to the IF, f IF . The IF, f IF , is within, but not limited to, the L-band range (e.g., 1.7–2.2 GHz). This range is preferable because it is high enough that the ODU ( 106 ) upconversion will allow filtering of the ODU ( 106 ) local oscillator (LO).

The signal is then fed from the IDU ( 100 ) to the ODU ( 106 ) via a connecting cable ( 107 ). The connecting cable ( 107 ) is preferably one with low loss. An example of a suitable connecting cable ( 107 ) is RG-6 cable, currently used with many other applications, such as digital satellite television set-tops. The ODU ( 106 ) is located at the transmitting terminal's antenna. The ODU ( 106 ) modulates the signal received from the IDU ( 100 ) and upconverts it to the transmit frequency, f TX . The transmit frequency, f TX , is between 29.5 and 30 GHz, frequencies for operation within the K a -band. Once the signal has been upconverted to the frequency f TX , it is ready for transmission.

A more detailed description of the digital modulator ( 103 ), analog IF modulator ( 105 ), and the circuitry in between the two modulation stages—all or some of which might be used to implement the present invention—will now be given using the detailed block diagram of FIG. 2 .

FIG. 2 shows the detailed block diagram of the digital modulator ( 103 ) and the IF modulator ( 105 ). The digital modulator ( 103 ) can be implemented using a variety of methods. Possible methods of the digital modulator ( 103 ) implementation include software-defined digital signal processing chips (DSPs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), and other types of integrated circuits (ICs).

The components of the digital modulator ( 103 ), shown in FIG. 2 , will now be explained.

A numerically controlled oscillator (NCO) ( 201 ) generates two signals centered at a frequency ω d : sin ω d and cos ω d . The frequency, ω d , refers to the same frequency as does the frequency, f d . The only difference is that cod is expressed in radians and f d is expressed in Hertz. Thus, as used hereafter and in the appended claims, ω x refers to the same frequency as does f x , where ‘x’ is an arbitrary subscript.

As shown in FIG. 2 , the I signal ( 101 ) and the cos ω d signal are multiplied with a multiplier ( 200 a ). The Q signal ( 102 ) and the sin ω d signal are also multiplied using another multiplier ( 200 b ). The resulting products from multipliers ( 200 a ) and ( 200 b ) are then added with an adder ( 202 a ). The adder blocks ( 202 a,b,c ) are designed to perform either addition or subtraction and can be programmed to perform either operation. The resulting signal contains both the I ( 101 ) and Q ( 102 ) signals and is I cos ω d +Q sin ω d .

Simultaneously, the I signal ( 101 ) and the sin ω d signal are multiplied with a multiplier ( 200 c ). The product of the Q signal ( 102 ) and the cos ω d signal, obtained by using another multiplier ( 200 d ), is subtracted, using another adder ( 202 b ), from the result of the multiplier ( 200 c ). The resulting signal also contains both the I ( 101 ) and Q ( 102 ) signals and is I sin ω d −Q cos ω d .

Both output signals of the digital modulator ( 103 ), I cos ω d +Q sin ω d and I sin ω d −Q cos ω d , are input into Dual DACs ( 104 a,b ). Depending on the application and method of implementation of the digital modulator ( 103 ), a certain amount of bits of the digital modulator ( 103 ) output signals are output at a given instant. An example, as shown in FIG. 2 , would be that the output signals arrive at the dual DACs ( 104 a,b ) in 8-bit increments.

The circuitry found between the digital modulator ( 103 ) and the analog IF modulator ( 105 ) will now be explained using FIG. 2 .

As explained in connection with FIG. 1 , Dual DACs ( 104 a,b ) convert the digital output signals from the digital modulator ( 103 ) to analog signals. The Dual DACs ( 104 a,b ) are controlled with an external clock signal ( 203 ). This clock signal ( 203 ) determines when the Dual DACs ( 104 a,b ) sample and then hold the two output signals of the digital modulator ( 103 ). This clock signal ( 203 ) is generated by dividing the receive symbol clock, f SYM ( 302 ; FIG. 3 ), by an integer using a divider block ( 308 ; FIG. 3 ), as shown in FIG. 3 . The receive symbol clock, f SYM ( 302 ), is recovered from the receiving data obtained from the satellite downlink signal and is a large multiple of the transmit symbol clock in this example. This allows the transmitter to maintain time synchronism with the satellite oscillators that generate f SYM .

Returning to FIG. 2 , the two analog signals are then amplified by a specific gain ( 205 ) with amplifiers ( 204 a,b ). This is a common practice in upconverter design. Because of signal scaling and attenuation that occurs in the digital modulation ( 103 ) stage as well as in the Dual DACs ( 104 a,b ), the signals need to be amplified before being modulated again by the analog IF modulator ( 105 ).

After being amplified, the two analog signals are then low pass filtered by low pass filters (LPFs) ( 206 a,b ) to remove the possible interference present at unwanted frequencies that would alias down and interfere with the desired signal during the detection process.

The components of the analog IF modulator ( 105 ), shown in FIG. 2 , will now be explained.

An example of an analog IF modulator ( 105 ) that might be used in two-way satellite communication systems is the RF2483 IQ modulator made by RF MicroDevice™. Other models made by the same or different companies might also be used. Inside the analog IF modulator ( 105 ), a 90° Phase Shifter ( 208 ) splits a carrier signal of frequency ω c into two signals: sin ω c and cos ω c . The carrier frequency, ω c , is generated by an analog frequency synthesizer which outputs a frequency, f VCO,IF ( 209 ). The frequency synthesizer will be explained in more detail below in connection with FIG. 3 and FIG. 4 . The output from the top LPF ( 206 a ) is mixed with the cos ω c signal using an analog mixer ( 207 a ). The resulting signal is I cos ω c cos ω d +Q cos ω c sin ω d . The other LPF's ( 206 b ) output is mixed with the sin ω c signal using a second analog mixer ( 207 b ). Its resulting signal is I sin ω c sin ω d −Q sin ω c cos ω d . These two signals can then be either added or subtracted, depending on the type of IF transmit signal (f IF ) ( 210 ) desired. If a lower sideband signal, or a signal centered at a frequency lower than ω c , is desired, the two signals are added by the adder ( 202 c ). Using common trigonometric identities, it can be shown that the resulting output of the adder ( 202 c ) is I cos (ω c −ω d )−Q sin (ω c −ω d ). Likewise, if an upper sideband signal, or a signal centered at a frequency higher than ω c , is desired, the two signals are subtracted by the adder ( 202 c ). Using trigonometric identities, it can be shown that the resulting output of the adder ( 202 c ) in this case is I cos (ω c +ω d )+Q sin (ω c +ω d ). In the case of some satellite communication systems, the lower sideband signal is desired. Therefore, the adder ( 202 c ) is programmed to add. The output of the adder ( 202 c ) is then amplified by a gain variable amplifier ( 204 c ). This provides a good dynamic range to control the output power. The amplified signal is the IF signal with frequency f IF ( 210 ).

FIG. 3 illustrates the embodiments of the present invention. More specifically, the embodiments entail a method and system whereby the NCO ( 300 ) generates a frequency offset near baseband. The frequency offset allows for a larger frequency step size than is traditionally used for the analog frequency synthesizers ( 303 , 304 ). The frequency offset also compensates for the Doppler effect. The embodiments will be explained in more detail below.

As shown in FIG. 3 and in the case of some K a -band two-way satellite communication systems, there are two frequency synthesizers ( 303 , 304 ) that generate f VCO,IF for the analog IF modulator ( 105 ). The two frequency synthesizers ( 303 , 304 ) are set up in a ping-pong configuration. This means that while one frequency synthesizer (e.g., 303 ) locks into the desired frequency, the other frequency synthesizer (e.g., 304 ) tunes to the next desired frequency that will be hopped to. This next frequency is determined by the receiving data ( 301 ). The system dwells on the first frequency for a set amount of time (e.g., 962 microseconds) before a control signal, Freq_SW ( 413 ; FIG. 4 ), indicates to the switch ( 305 ) to switch to the frequency generated by the second frequency synthesizer ( 304 ). The ping-pong configuration allows for switching between hopping frequencies of the frequency synthesizers ( 303 , 304 ) within a few nanoseconds.

FIG. 4 shows the specific components of the frequency synthesizers ( 303 , 304 ) that could be used in conjunction with the present invention. The control signal LE 1 ( 411 ) is high if the frequency command data ( 301 ) is to be input into frequency synthesizer 1 ( 303 ). Likewise, the control signal LE 2 ( 412 ) is high if the data ( 301 ) is to be input into frequency synthesizer 2 ( 304 ).

The components that comprise the frequency synthesizer 1 ( 303 ) will now be explained. The frequency synthesizer 2 ( 304 ) has identical components, most of which are not labeled with numbers in FIG. 4 . The words “frequency synthesizer” will be used to refer to the frequency synthesizer 1 ( 303 ) in the following explanation.

The frequency synthesizer ( 303 ) is comprised of an electronic circuit with a voltage controlled oscillator (VCO) ( 400 ) that is constantly adjusted to match, in phase, the frequency of an input signal. The output of the VCO ( 400 ) is f VCO,IF . This output is fed back into a frequency synthesizer chip ( 401 ) via a power split ( 402 ). A preferred frequency synthesizer chip ( 401 ) for such a K a -band two-way satellite communication system is the LMX2350 chip made by National Semiconductor™. However, other models of frequency synthesizer chips ( 401 ) made by the same or different companies might also be used.

The frequency synthesizer chip ( 401 ) is programmable. The programmable functions are accessed through a serial interface. This serial interface is the same as the data input ( 301 ). Within the frequency synthesizer chip, there is a fraction-N frequency synthesizer ( 403 ). This takes the signal generated by the VCO ( 400 ) and, in turn, generates a signal (e.g., a sine wave) of frequency f VCO,IF that is input into a phase detector ( 404 ). The phase detector ( 404 ) also has a second input which is a signal with the desired step size frequency. The desired step size frequency for the example class A two-way satellite communication system is 702.5 kHz. For a class B system, the desired step size frequency is 3.5125 MHz. The reasoning behind the choice of these specific step size frequencies will be explained in more detail below in connection with FIG. 5 . However, other two-way satellite communication systems may employ different channel bandwidths and, hence, have different step sizes.

As shown in FIG. 4 , the desired step size frequency is derived using a series of divider blocks ( 405 , 406 ). The symbol clock, f SYM ( 302 ), is divided with a divide-by-7 block ( 405 ). The resulting frequency is 28.1 MHz. This frequency can be divided by using another divider block ( 406 ) to give the desired comparison frequency which derives the step size frequency. This divider block ( 406 ) is preferably inside the frequency synthesizer chip ( 401 ). Its dividing number can be programmed by the user. In, for example, a class A system, the dividing number is 40 because 28.1 MHz divided by 40 equals 702.5 kHz, the desired step size frequency. Likewise, for a class B system, the dividing number is 12, resulting in a comparison frequency of 2.34 MHz that generates a step size of 3.5125 MHz in the frequency synthesizers ( 303 , 304 ). In other applications, the dividing numbers of the divider blocks ( 405 , 406 ) can be modified based on the desired frequency step size.

Returning to the description of the phase detector ( 404 ) of FIG. 4 , the phase of the desired step size frequency is compared by the phase detector ( 404 ) to the phase of the frequency of the signal output of the fraction-N frequency synthesizer ( 403 ). If the phases are different, the frequency of the output signal of the fraction-N frequency synthesizer ( 403 ) is not a multiple of the frequency step size. Therefore, the phase detector ( 404 ) outputs a signal with an increased or decreased voltage level signaling to the VCO ( 400 ) to either increase or decrease the frequency of the signal which it outputs. This feedback loop continues until the phases of the step size frequency and the output signal of the fraction-N frequency synthesizer ( 404 ) are identical.

As shown in FIG. 4 , there is a bank of 4 different loop filters ( 407 a–d ) between the phase detector ( 404 ) and the VCO ( 400 ). Only one loop filter (e.g., 407 a ) is used at a time. The band number, class of system (either class A or class B), and desired f VCO,IF determines which loop filter ( 407 a–d ) is to be used. A multiplexor (MUX) ( 408 ), controlled by the control signals Band — 1 ( 409 ) and Band — 0 ( 410 ), chooses which of the 4 loop filters ( 407 a–d ) is used. The loop filters ( 407 a–d ) are used to add stability to the system, reject spurious noise, and decrease the settling time. In the case of many K a -band two-way satellite communication systems, the frequency will hop only within one band, so the MUXes ( 408 ) in each of the frequency synthesizers ( 303 , 304 ) share the same control signals ( 409 , 410 ). The commands to choose which loop filter ( 407 a–d ) that is used, in the case of an exemplary K a -band two-way satellite communication system, are listed in Table 1.

FIG. 5 will be used in conjunction with FIG. 3 to explain the first embodiment whereby the NCO ( 300 ; FIG. 3 ) generates an offset that allows for a large frequency step size for the analog frequency synthesizers ( 303 , 304 ; FIG. 3 ). As shown in FIG. 5 , there are 4 approximately 125 MHz bands ( 500 a–d ) within which the example two-way satellite communication system operates. Each band is partitioned into a set number (n) of channels, depending on the application. FIG. 5 shows channels 1 ( 501 ), 2 ( 502 ), 3 ( 503 ), and n ( 504 ). In the case of an exemplary K a -band two-way satellite communication system, the bands ( 500 a–d ) are partitioned into either n=175 channels for Class A systems or n=35 channels for class B systems.

Each channel (e.g., 501 ) in a particular band (e.g., 500 a ) has a bandwidth equal to the bandwidth of all the other channels (e.g., 502 – 504 ) in the four 125 MHz bands ( 500 a–d ). For class A systems, the channel ( 501 – 504 ) bandwidth is 702.5 KHz. For class B systems, the channel ( 501 – 504 ) bandwidth is 3.5125 MHz.

In between each of the 125 MHz bands ( 500 a–d ) there is a guard band ( 505 ). The guard band's ( 505 ) width, in the case of an exemplary K a -band two-way satellite communication system, is 2.0625 MHz. This bandwidth is not a multiple of the channel ( 501 – 504 ) bandwidths. Thus, there are not a fixed number of channel bandwidth spacings in between the n'th channel ( 504 ) of one band (e.g., 500 a ) and the first channel of an adjacent band (e.g., 500 b ). This makes it impractical to use a frequency synthesizer ( 303 , 304 ) with a frequency step size equal to the channel (e.g., 501 ) bandwidth's size unless a design is implemented that gives an offset frequency of the right amount so as to allow the use of a step size equal to the channel (e.g., 501 ) bandwidth's size. By generating a frequency offset with the NCO ( 300 ; FIG. 3 ), the channel (e.g., 501 ) bandwidth's size can be used as the size of the step size for the frequency synthesizers ( 303 , 304 ).

The number of channels ( 501 – 504 ), channel ( 501 – 504 ) bandwidths, band ( 500 a–d ) widths, and guard band ( 505 ) widths are dependent on the particular application and can vary. The present invention covers all such possibilities.

An illustration of the procedure used to generate the frequency offset required to maintain a desired step size for the frequency synthesizers ( 303 , 304 ) with the NCO ( 300 ; FIG. 3 ) will be given using the example class A system. Similar procedures could be used with other applications. FIG. 5 will be referenced during this illustration.

A class A system has channel bandwidths of 702.5 kHz. The spacing between the center frequency of channel n=175 ( 504 ) of band 1 ( 500 a ) and the center frequency of channel 1 ( 501 ) of band 2 ( 500 b ) is 2.0625 MHz+702.5 kHz=2.765 MHz. Dividing this number by the channel (e.g., 501 ) bandwidth (702.5 kHz) gives 3.9359. This is obviously not an integer and therefore a step size of 702.5 kHz for the frequency synthesizers ( 303 , 304 ; FIG. 3 ) would not normally be used to frequency hop between the center frequencies of the channels ( 501 – 504 ) across all four bands ( 500 a–d ).

Because 2,765,000,000=(5^4)*(2^3)*7*79 (where x^y means x raised to the y-th power and * is multiplication) and 702,500=(5^4)*(2^2)*3*11, the greatest common devisor between these two numbers is (5^4)*(2^2)=2,500 Hz. Thus, the frequency synthesizers ( 303 , 304 ; FIG. 3 ) would normally need to have a step size of 2,500 Hz to be able to hit the channel ( 501 – 504 ) center frequencies across the four 125 MHz bands ( 500 a–d ).

Referring now to FIG. 3 , by adding or subtracting a small frequency offset in the digital modulation stage ( 103 ) with the NCO ( 300 ), 702.5 kHz is used as the step size for the frequency synthesizers ( 303 , 304 ). The amount of frequency offset depends on the band number ( 500 a–d ; FIG. 5 ) and can be calculated a priori for input to the NCO ( 300 ). This band offset is fixed for all the channels within a given 125 MHz band. Using this information, the NCO ( 300 ) can adjust the amount of frequency offset that it is providing to the amount of frequency offset needed to allow a frequency step size of 702.5 kHz.

FIG. 3 also shows that the frequency offset generated by the NCO ( 300 ) includes a frequency offset that compensates for the Doppler effect in addition to the small fixed band offset that adjusts for hopping within a given band. By compensating for the slowly varying, low frequency Doppler effect and band offset near baseband, the spurious noise emissions that result from such correction lie close to the bandwidth of the signal. This is in contrast to other methods that use the NCO ( 300 ) to perform simultaneous Doppler correction frequency hopping across all or a subset of the channels within a band ( 500 a–d ; FIG. 5 ) while employing analog frequency synthesizers ( 303 , 304 ) that center this digital output within the band. In other words, the spurious noise from the intermodulation products at ±nf VCO,IF ±mf d only changes by the ±mf d factor. An example will be given with a class A system using FIG. 6 and FIG. 7 .

FIG. 6 shows a transmitted signal ( 600 ) in the frequency domain. If the NCO ( 300 ; FIG. 3 ) frequency offset, f d , is much smaller than the signal channel bandwidth (BW) (e.g., 702.5 kHz), then spurious noise ( 601 ) near the desired IF output at F VCO,IF +f d will lie near the desired channel BW and, in general, fall within a specified adjacent channel emissions mask ( 602 ). This adjacent channel emissions mask ( 602 ) dictates the level of spurious noise ( 601 ) that can be present in any given channel.

However, as shown in FIG. 7 , if the NCO ( 300 ; FIG. 3 ) performs channel frequency hopping and Doppler correction, f d changes in multiples of the channel BW and the intermodulation products, or spurious noise ( 601 ), will fall in adjacent channel bands and will likely exceed the adjacent channel emissions mask ( 602 ), as shown in FIG. 7 . Filtering these emissions for a large hopping f d can be complicated and costly while no filtering is needed for the smaller f d of the example given in FIG. 6 .

Returning to FIG. 3 , the amount of frequency compensation that the NCO ( 300 ) must provide to compensate for the Doppler effect is extracted from the received data ( 301 ). In the case of an exemplary K a -band two-way satellite communication system, this method of Doppler effect correction is capable of a compensation resolution of 0.5 Hz or less. Other levels of compensation resolution could be required and achieved depending on the application.

As FIG. 3 shows, the NCO ( 300 ) generates a frequency offset that results in a large frequency step size and at the same time compensates for the Doppler effect. The method of generating the appropriate offset frequency that results in a large frequency step size and at the same time compensates for the Doppler effect in the class A and class B systems will now be explained. First, the desired f VCO,IF is generated by programming specific values into the frequency synthesizer chip ( 401 ; FIG. 4 ). In the class A system, f VCO,IF is represented by the following equation: f VCO,IF =f SYM *(N+F/16)/280. In the class B system, f VCO,IF is represented by the following equation: f VCO,IF =f SYM *(N+F/16)/84. N and F are parameters that are programmed into the frequency synthesizer chip ( 401 ). As can be seen in the given equations for f VCO,IF , varying N and F results in different values of f VCO,IF .

After f VCO,IF has been generated, it is then subtracted from the desired IF frequency, f IF , to give the needed frequency offset that the NCO ( 300 ) must produce to result in the desired step size (702.5 kHz for class A systems and 3.5125 MHz for class B systems). As an example of the values of F and N that are needed to generate different values of f VCO,IF , as well as the resulting frequency offset that the NCO ( 300 ) generates, Tables 2–9 list the tuning commands for the all the channels in the class A and class B systems.

As can been seen in the tables above, the maximum offset frequency from the NCO ( 300 ) in either class A or class B systems is less than 70 kHz which is much smaller than either of the 702.5 kHz or 3.5125 MHz channel bandwidths for class A or class B, respectively. These offsets differ for each band ( 500 a–d ; FIG. 5 ), but are fixed within a given band (e.g., 500 a ; FIG. 5 ).

After producing the frequency offset that is needed for a desired frequency step size, the NCO ( 300 ) will change the frequency offset slightly to compensate for the Doppler effect in each band ( 500 a–d ; FIG. 5 ).

Finally, the components labeled as ( 306 ) in FIG. 3 are part of the IDU ( 100 ). A detailed description of their functionality will not be given. They may or may not be needed in two-way satellite communication systems. As can be seen in FIG. 3 as well, a phase lock loop (PLL) ( 307 ) generates the reference frequency, f REF , that is used by the components of the ODU ( 106 ).

The preceding description has been presented only to illustrate and describe the invention. It is not intended to be exhaustive or to limit the invention to any precise form disclosed. Many modifications and variations are possible in light of the above teaching.

The preferred embodiment was chosen and described in order to best explain the principles of the invention and its practical application. The preceding description is intended to enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the following claims.