Universal output driver

The subject matter of this application relates to the subject matter of U.S. Pat. Nos. 6,316,927 and 6,114,844 which are incorporated herein by reference in their entireties.

This invention relates to line communications and more particularly to a line driver capable of producing output drive signals with amplitudes greater than the supply voltage.

Conventional line drivers commonly produce output signals with amplitudes that are limited by supply voltages. As integrated circuitry and process technologies improved, supply voltages reduced with associated reductions in the amplitudes of output drive signals.

Certain known schemes for increasing the amplitudes of output drive signals employ current-drive circuitry and transformer windings to produce output signals of greater amplitude than the supply voltages. However, such current-drive circuits commonly consume more power than voltage-drive circuitry and the inductive impedance inhibits rapid turn on/turn off operation.

In accordance with an illustrated embodiment of the present invention, a center-tapped transformer and associated drive circuitry deliver output drive signals with greater amplitude than the supply voltages, and with the associated drive circuitry greatly simplified to reduce power consumption and the processing involved for integrating the drive circuitry. P-MOS circuitry connected to a high-side supply voltage is eliminated in favor of transformer coupling from an N-MOS low-side supply voltage. The transformer also isolates the output drive signal from ground for enhanced versatility in connecting to communication lines. Output wave shapes for universal driver applications may be controlled in response to activation of a plurality of variable conduction elements in accordance with a selected logical sequence.

FIG. 1 is a schematic diagram of a line-driver circuit including a transformer of selected turns ratio and single ended N-MOS driver circuits;

FIG. 2 is a schematic diagram of one embodiment of a circuit for implementing the defining equation;

FIG. 3 is a schematic diagram of an embodiment of the driver circuits including the circuit of FIG. 2 and circuitry for energizing the primary windings of the transformer; and

FIGS. 4 a, b are schematic diagrams of circuitry for producing the requisite current supplies in the circuit of FIG. 3 .

Referring now to FIG. 1, there is shown a schematic diagram of a circuit including a transformer 9 of selected n:m turns ratio, and forming a basis for describing operation of the present invention. Each single-ended input including N-MOS transistors 12 , 14 controls application of supply voltage V DD to respective portions of the center-tapped primary winding 13 , 15 . Specifically, it can be shown that the maximum output voltage Vout across the secondary winding 11 of the transformer 9 is determined. V out = V DD × m n × ( 1 2  n m ) 2  R L R 2 + ( 1 2  n m ) 2  R L × 2 (Equation  1)

Thus, V out = 2  m n  V DD ( R L ( 2  m n ) 2  R 2 + R L ) (Equation  2)

and V out = 2  m n  V DD ,    as     R 2 → 0 (Equation  3)

Vout can be therefore greater than V DD , if m>½n.

R 2 , as the equivalent resistance of the N-MOS transistor 14 in the ON conduction state, is substantially equal to the equivalent resistance R 4 of the N-MOS transistor 12 in the ON conductive state. In addition, although the circuit may be driven or controlled single-endedly via transistor 12 or 14 , the output V out is differential due to the windings on the transformer 9 .

From Equation 3, it should be noted that the value of resistance R 2 (or its equivalent, R 4 ) must be carefully controlled in order to produce output signal of stable amplitude that is independent of the supply voltage V DD , and independent of process variations by which the N-MOS transistor 12 (and 14 ) is produced. Thus, from Equation 1, the stable value of output voltage may be set at V BG (i.e., the conventional bandgap voltage): V out = V DD  ( 2     R LOAD R LOAD + 4     R 2 ) = V CONSTANT = a     V BG (Equation  4)

where m=n and α is an arbitrary ratio.

this is represented by a stable, internal voltage supply. Thus: V DD a     V BG = 1 2 + 2     R 2 R LOAD (Equation  5)

and R 2 = ( V DD  a     V BG 2 V BG )  R load 2    (Equation  6)

and R 2     α ( V DD - a     V BG 2 I EXT ) (Equation  7)

where: I EXT = V BG R EXT (Equation  8)

and R EXT is an external resistor that behaves similarly to R LOAD . Thus: R 2     α  V DD - V BG I EXT (Equation  9)

for α chosen to be 2.

and the temperature effects of the external resistor and the load resistor substantially cancel.

Referring now to FIG. 2, there is shown a schematic diagram of one circuit embodiment for implementing the control of the equivalent resistance R 2 . Specifically, current source, I ext , 105 is connected to a variable equivalent resistance R 2 110 , and current source 120 of value V DD - V BG R A

is connected to resistance R B 125 in a bridge-type circuit configuration. The operational amplifier 130 has a pair of inputs 140 , 145 that are connected to the common junctions of the respective current sources and equivalent resistances, as shown, to supply an output 135 to adjust the value of R 2 110 in response to the difference of voltages on the common junctions.

Referring, then, to FIG. 3, there is shown the schematic diagram of one embodiment of the driver circuit of the present invention including the driver circuit and resistance-controlling circuit of FIGS. 1 and 2. Specifically, the adjustable resistance in the circuit of FIG. 2 is shown as an N-MOS transistor 25 , and the inputs to the primary windings 13 , 15 of the transformer 9 are also shown as N-MOS transistors or equivalent resistors 27 , 29 , with switch arrays 31 , 33 , 35 shown connecting the gates thereof to receive the controlling output signal 135 from the amplifier 130 . Such switches may be conventionally implemented as logic gates that are turned ON/OFF controllably. The ON/OFF status of switch 31 may serve as an input to the circuit, and the plurality of switches 33 , 35 may be turned ON/OFF in a selected sequence to set rise and fall times or other wave forming functions of the output signal. The selected transformer ratio is conveniently set at 1:1, for example, to facilitate bifilar winding for size reduction and coupling efficiency between windings.

Referring now to FIG. 4 a , there is shown a schematic diagram of one circuit embodiment for implementing the current source I EXT 105 in the circuit of FIG. 3 . Specifically, operational amplifier 150 is referenced to the voltage supply V BG and receives the voltage drop across an external resistor R EXT 151 to apply the amplified difference between the two voltages to the gate of N-MOS transistor 153 . This transistor 153 is serially connected with one branch of current mirror 155 formed by P-MOS transistors 37 , 39 that is connected between V DD and R EXT 151 . The other branch of current mirror 155 supplies the current I EXT = V BG R EXT

from the V DD voltage supply in the circuit of FIG. 3 .

Referring now to FIG. 4 b , there is shown a schematic diagram of one circuit embodiment for implementing the current source 121 of value I= I = V DD - V BG R A

in the circuit of FIG. 3 . Specifically, operational amplifier 123 is referenced to the voltage V BG , and is connected to receive the voltage across resistor R C 126 as one of the resistors in the circuit comprising the resistor R C 126 and N-MOS transistor 127 and resistor R C 129 connected between V DD and ground. Operational amplifier 131 is connected to receive the voltage appearing across the combination of resistor Rc 126 and the N-MOS transistor 127 , and is also connected to receive the voltage appearing across resistor R A 133 connected to ground. The amplified difference of these two voltages is supplied to the gate of N-MOS transistor 136 which conducts current through one branch of the ‘current mirror’ circuit 138 that thus supplies the current I = V DD - V BG R A

for the circuit of FIG. 3 through the other branch of the current mirror 138 . All of the transistors and operational amplifiers and resistors may be conveniently fabricated on a common semiconductor substrate using conventional integrated circuit processing.

Therefore, the line driver of the present invention is capable of operating at low supply voltage to produce output drive signals with amplitudes greater than the supply voltage, and with stabilized signal amplitude that is substantially independent of variations in amplitude of the supply voltage, and with universally-compatible wave shaping under logic control.