Inventor
Zhenjiang Cui
Inventor
San Jose, CA, US
Overview
Patents· 28 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1031%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%
C23CCoating metallic material13%
H01JElectric discharge tubes or discharge lamps13%
H01LSemiconductor devices10%
H10DInorganic electric semiconductor devices5%
H10BElectronic memory devices4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
B08BCleaning in general1%
C23FNon-mechanical removal of metallic material from surface1%
PatentTitleYear
10,861,676Metal recess for semiconductor structures202010,854,426Metal recess for semiconductor structures20209,960,049Two-step fluorine radical etch of hafnium oxide20189,947,549Cobalt-containing material removal20189,576,788'Cleaning high aspect ratio vias'20179,478,434'Chlorine-based hardmask removal'20169,355,862'Fluorine-based hardmask removal'20168,951,911'Process for damascene structure with reduced low-k damage'20158,058,183'Restoring low dielectric constant film properties'20117,879,683'Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay'20117,811,924'Air gap formation and integration using a patterning cap'20107,588,036'Chamber clean method using remote and in situ plasma cleaning systems'20097,547,643'Techniques promoting adhesion of porous low K film to underlying barrier layer'20097,459,404'Adhesion improvement for low k dielectrics'20087,259,111'Interface engineering to improve adhesion between low k stacks'20077,229,911'Adhesion improvement for low k dielectrics to conductive materials'20077,189,658'Strengthening the interface between dielectric layers and barrier layers with an oxide layer of varying composition profile'20077,097,886'Deposition process for high aspect ratio trenches'20067,030,041'Adhesion improvement for low k dielectrics'20067,018,941'Post treatment of low k dielectric films'20066,992,024'Gapfill process using a combination of spin-on-glass deposition and chemical vapor deposition techniques'20066,936,843'Fixture used to prepare semiconductor specimens for film adhesion testing'20056,890,597'HDP-CVD uniformity control'20056,878,644'Multistep cure technique for spin-on-glass films'20056,818,894'Method and apparatus for characterization of ultrathin silicon oxide films using mirror-enhanced polarized reflectance fourier transform infrared spectroscopy'20046,790,707'Method of preparing a sample of a semiconductor structure for adhesion testing'20046,693,050'Gapfill process using a combination of spin-on-glass deposition and chemical vapor deposition techniques'20046,635,144'Apparatus and method for detecting an end point of chamber cleaning in semiconductor equipment'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2020Patents assigned to APPLIED MATERIALS INC (27)· patent assignee history
2003–2006Based in Santa Clara, CA, US· patent location history
2004–2020Based in San Jose, CA, US· patent location history
2011–2015Patents assigned to CUI ZHENJIANG (2)· patent assignee history
2011Patents assigned to DEMOS ALEXANDROS T (1)· patent assignee history
2011Patents assigned to NAIK MEHUL (1)· patent assignee history
2015Patents assigned to NAIK MEHUL B (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLIED MATERIALS INC | 27 | 2003–2020 |
| CUI ZHENJIANGself | 2 | 2011–2015 |
| DEMOS ALEXANDROS T | 1 | 2011 |
| NAIK MEHUL | 1 | 2011 |
| NAIK MEHUL B | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 25 | 2004–2020 |
| Santa Clara, California, US | 3 | 2003–2006 |