Inventor
Yi-Hsuan Hsiao
Inventor
Hsinchu, TW
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices27%
H01LSemiconductor devices24%
H10BElectronic memory devices24%
G11CStatic stores10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H01RElectrically-conductive connections2%
PatentTitleYear
11,031,290Semiconductor structure with cutting depth control and method for fabricating the same202110,985,490Safety socket202110,867,998Semiconductor structure cutting process and structures formed thereby202010,833,077Semiconductor structure cutting process and structures formed thereby202010,461,171Structure and formation method of semiconductor device with metal gate stacks201910,460,994Residue-free metal gate cutting for fin-like field effect transistor20199,536,611'3D NAND memory using two separate SSL structures in an interlaced configuration for one bit line'20179,536,893'Three-dimensional memory and method for manufacturing the same'20179,520,482'Method of cutting metal gate'20169,425,191'Memory device and manufacturing method of the same'20169,252,156'Conductor structure and method'20169,214,351'Memory architecture of thin film 3D array'20159,087,825'Semiconductor structure and method for manufacturing the same'20158,987,914'Conductor structure and method'20158,860,124'Depletion-mode charge-trapping flash device'20148,759,899'Integration of 3D stacked IC device with peripheral circuits'20148,609,554'Semiconductor structure and method for manufacturing the same'20138,547,741'Nonvolatile stacked NAND memory'20138,488,387'Thermally assisted dielectric charge trapping flash'20138,304,911'Semiconductor structure and manufacturing method of the same'20128,183,617'Injection method with Schottky source/drain'20128,081,516'Method and apparatus to suppress fringing field interference of charge trapping NAND memory'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2017Patents assigned to MACRONIX INT CO LTD (15)· patent assignee history
2011–2014Patents assigned to HSIAO YI-HSUAN (8)· patent assignee history
2011–2015Based in Chiayi County, TW· patent location history
2012–2014Patents assigned to LUE HANG-TING (7)· patent assignee history
2012–2014Patents assigned to CHEN SHIH-HUNG (2)· patent assignee history
2012Based in Budai Townahip, TW· patent location history
2013–2019Based in Hsinchu, TW· patent location history
2013–2014Based in Budai Township, TW· patent location history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (6)· patent assignee history
2019–2021Based in Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MACRONIX INT CO LTD | 15 | 2011–2017 |
| HSIAO YI-HSUANself | 8 | 2011–2014 |
| LUE HANG-TING | 7 | 2012–2014 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 6 | 2016–2021 |
| CHEN SHIH-HUNG | 2 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 9 | 2013–2019 |
| Taipei, TW | 5 | 2019–2021 |
| Chiayi County, TW | 5 | 2011–2015 |
| Budai Township, TW | 2 | 2013–2014 |
| Budai Townahip, TW | 1 | 2012 |