Inventor

Richard Joseph Saia

Inventor
Niskayuna, NY, US

Overview

65→
Patents
1984–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 65 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
Y10TTechnical subjects covered by former us classification12%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
H10DInorganic electric semiconductor devices8%
H05KPrinted circuits7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H01HElectric switches4%
B29CShaping or joining of plastics4%
B81BMicrostructural devices or systems, e.g. micromechanical devices4%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation3%
PatentTitleYear
10,903,330Tapered gate electrode for semiconductor devices202110,276,486Stress resistant micro-via structure for flexible circuits20199,406,762'Semiconductor device with junction termination extension'20168,604,612'Chip attach adhesive to facilitate embedded chip build up and related systems and methods'20138,498,131'Interconnect structure'20138,008,781'Apparatus and method for reducing pitch in an integrated circuit'20117,964,974'Electronic chip package with reduced contact pad pitch'20117,952,187'System and method of forming a wafer scale package'20117,785,482'Method of making an ignition device'20107,752,751'System and method of forming a low profile conformal shield'20107,158,383'Techniques for fabricating a resistor on a flexible base material'20077,011,983'Large organic devices and methods of fabricating large organic devices'20066,994,897'Method of processing high-resolution flex circuits with low distortion'20066,988,706'Piezoelectric microvalve'20066,935,792'Optoelectronic package and fabrication method'20056,790,779'Anisotropic dry etching technique for deep bulk silicon etching'20046,790,703'Apparatus for aligning die to interconnect metal on flex substrate'20046,773,962'Microelectromechanical system device packaging method'20046,767,764'Microelectromechanical system device packaging method'20046,733,711'Plastic packaging of LED arrays'20046,730,533'Plastic packaging of LED arrays'20046,709,944'Techniques for fabricating a resistor on a flexible base material'20046,614,103'Plastic packaging of LED arrays'20036,548,329'Amorphous hydrogenated carbon hermetic structure fabrication method'20036,515,417'Organic light emitting device and method for mounting'20036,475,877'Method for aligning die to interconnect metal on flex substrate'20026,429,381'High density interconnect multichip module stack and fabrication method'20026,323,096'Method for fabricating a flexible interconnect film with resistor and capacitor layers'20016,150,719'Amorphous hydrogenated carbon hermetic structure and fabrication method'20006,146,558'Structure and method for molding optical disks'20005,973,908'Structure for thin film capacitors'19995,963,791'Silicon carbide MOSFET having self-aligned gate structure and method of fabrication'19995,950,303'Method and fixturing to perform two side laminations of stacked substrates forming 3-D modules'19995,874,770'Flexible interconnect film including resistor and capacitor layers'19995,844,810'Scaled adaptive lithography'19985,814,859'Self-aligned transistor device including a patterned refracting dielectric layer'19985,774,326'Multilayer capacitors using amorphous hydrogenated carbon'19985,736,448'Fabrication method for thin film capacitors'19985,726,463'Silicon carbide MOSFET having self-aligned gate structure'19985,699,234'Stacking of three dimensional high density interconnect modules with metal edge contacts'19975,657,537'Method for fabricating a stack of two dimensional circuit modules'19975,652,559'Method of micromachining electromagnetically actuated current switches with polyimide reinforcement seals, and switches produced thereby'19975,531,018'Method of micromachining electromagnetically actuated current switches with polyimide reinforcement seals, and switches produced thereby'19965,524,339'Method for protecting gallium arsenide mmic air bridge structures'19965,510,281'Method of fabricating a self-aligned DMOS transistor device using SiC and spacers'19965,475,353'Micromachined electromagnetic switch with fixed on and off positions using three magnets'19955,472,539'Methods for forming and positioning moldable permanent magnets on electromagnetically actuated microfabricated components'19955,454,904'Micromachining methods for making micromechanical moving structures including multiple contact switching system'19955,430,597'Current interrupting device using micromechanical components'19955,401,668'Method for fabrication solid state radiation imager having improved scintillator adhesion'19955,374,792'Micromechanical moving structures including multiple contact switching system'19945,370,972'Amorphous silicon photodiode with sloped sidewalls and method of fabrication'19945,367,585'Integrated microelectromechanical polymeric photonic switch'19945,362,660'Method of making a thin film transistor structure with improved source/drain contacts'19945,318,664'Patterning of indium-tin oxide via selective reactive ion etching'19945,302,547'Systems for patterning dielectrics by laser ablation'19945,285,571'Method for extending an electrical conductor over an edge of an HDI substrate'19945,198,694'Thin film transistor structure with improved source/drain contacts'19935,191,394'Amorphous silicon photodiode with sloped sidewalls and method of fabrication'19935,187,369'High sensitivity, high resolution, solid state x-ray imaging device with barrier layer'19934,871,617'Ohmic contacts and interconnects to silicon and method of making same'19894,845,050'Method of making mo/tiw or w/tiw ohmic contacts to silicon'19894,824,802'Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures'19894,522,681'Method for tapered dry etching'19854,444,618'Processes and gas mixtures for the reactive ion etching of aluminum and aluminum alloys'1984

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1984–2021Patents assigned to GEN ELECTRIC (62)· patent assignee history
1984–1989Based in Scotia, NY, US· patent location history
1993–2006Based in Schenectady, NY, US· patent location history
1995–2021Based in Niskayuna, NY, US· patent location history
2013–2019Patents assigned to SAIA RICHARD JOSEPH (3)· patent assignee history
2013–2019Patents assigned to GORCZYCA THOMAS BERT (2)· patent assignee history
2013Patents assigned to DUROCHER KEVIN MATTHEW (1)· patent assignee history
2013Patents assigned to FILLION RAYMOND ALBERT (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
GEN ELECTRIC621984–2021
SAIA RICHARD JOSEPHself32013–2019
GORCZYCA THOMAS BERT22013–2019
DUROCHER KEVIN MATTHEW12013
FILLION RAYMOND ALBERT12013
Locations
LocationPatentsSpan
Niskayuna, New York, US301995–2021
Schenectady, New York, US301993–2006
Scotia, New York, US51984–1989