Inventor

Rene A. Lujan

Inventor
Sunnyvale, CA, US

Overview

38→
Patents
1994–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 38 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H01LSemiconductor devices8%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
H03KPulse technique6%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein3%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
H01HElectric switches3%
PatentTitleYear
10,950,406Self-limiting electrical triggering for initiating fracture of frangible glass202110,903,176Method of forming a photodiode202110,460,878Multilayer capacitor201910,403,439Multilayer capacitor201910,332,717Self-limiting electrical triggering for initiating fracture of frangible glass201910,224,297Sensor and heater for stimulus-initiated fracture of a substrate201910,026,579Self-limiting electrical triggering for initiating fracture of frangible glass20189,396,972'Micro-assembly with planarized embedded microelectronic dies'20169,305,807'Fabrication method for microelectronic components and microchip inks used in electrostatic assembly'20169,263,124'UV sensor with nonvolatile memory using oxide semiconductor films'20168,465,795'Annealing a buffer layer for fabricating electronic devices on compliant substrates'20138,193,601'Structure and method for flexible sensor array'20127,973,311'Isolated sensor structures such as for flexible substrates'20117,884,361'Pattern-print thin-film transistors with top gate geometry'20117,824,949'Structure and method for flexible sensor array'20107,804,090'Patterned-print thin-film transistors with top gate geometry'20107,749,916'Additive printed mask process and structures produced thereby'20107,648,860'Self-aligned thin-film transistor and method of forming same'20107,649,205'Self-aligned thin-film transistor and method of forming same'20107,566,899'Organic thin-film transistor backplane with multi-layer contact structures and data lines'20097,459,400'Patterned structures fabricated by printing mask over lift-off pattern'20087,384,568'Method of forming a darkfield etch mask'20087,365,022'Additive printed mask process and structures produced thereby'20087,344,928'Patterned-print thin-film transistors with top gate geometry'20087,309,563'Patterning using wax printing and lift off'20077,189,589'Method of fabrication of a support structure for a semiconductor device'20077,018,877'Selective delamination of thin-films by interface adhesion energy contrasts and thin film transistor devices formed thereby'20066,504,175'Hybrid polycrystalline and amorphous silicon structures on a shared substrate'20036,348,693'X-ray imager and its method of fabrication'20026,140,668'Silicon structures having an absorption layer'20006,107,641'Thin film transistor with reduced parasitic capacitance and reduced feed-through voltage'20006,019,796'Method of manufacturing a thin film transistor with reduced parasitic capacitance and reduced feed-through voltage'20006,020,223'Method of manufacturing a thin film transistor with reduced parasitic capacitance and reduced feed-through voltage'20005,871,826'Proximity laser doping technique for electronic materials'19995,733,804'Fabricating fully self-aligned amorphous silicon device'19985,717,223'Array with amorphous silicon TFTs in which channel leads overlap insulating region no more than maximum overlap'19985,366,926'Low temperature process for laser dehydrogenation and crystallization of amorphous silicon'19945,278,028'Process for fabricating multi-discrete-phase fresnel lenses'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2003Patents assigned to XEROX CORP (11)· patent assignee history
1994–2021Based in Sunnyvale, CA, US· patent location history
1998–1999Based in Santa Clara, CA, US· patent location history
2006–2021Patents assigned to PALO ALTO RES CT INC (26)· patent assignee history
2012–2013Patents assigned to WONG WILLIAM S (2)· patent assignee history
2012Patents assigned to LIMB SCOTT J (1)· patent assignee history
2013Patents assigned to GREER JULIA ROSOLOVSKY (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
PALO ALTO RES CT INC262006–2021
XEROX CORP111994–2003
WONG WILLIAM S22012–2013
GREER JULIA ROSOLOVSKY12013
LIMB SCOTT J12012
Locations
LocationPatentsSpan
Sunnyvale, California, US351994–2021
Santa Clara, California, US31998–1999