Inventor
Ramesh Chandrasekharan
Inventor
Portland, OR, US
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
C23Cprimary
C23CCoating metallic material33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
H01LSemiconductor devices18%
H01JElectric discharge tubes or discharge lamps17%
H05BElectric heating2%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
B05BSpraying apparatus1%
B05CApparatus for applying fluent materials to surfaces, in general1%
C30BSingle-crystal growth1%
F16KValves1%
PatentTitleYear
11,111,581Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region202111,072,860Fill on demand ampoule refill202111,075,127Suppressing interfacial reactions by varying the wafer temperature throughout deposition202111,028,482Use of voltage and current measurements to control dual zone ceramic pedestals202110,808,317Deposition apparatus including an isothermal processing zone202010,781,516Chemical deposition chamber having gas seal202010,741,365Low volume showerhead with porous baffle202010,633,742Use of voltage and current measurements to control dual zone ceramic pedestals202010,622,243Planar substrate edge contact with open volume equalization pathways and side containment202010,378,107Low volume showerhead with faceplate holes for improved flow uniformity201910,347,547Suppressing interfacial reactions by varying the wafer temperature throughout deposition201910,323,323Systems and methods enabling low defect processing via controlled separation and delivery of chemicals during atomic layer deposition201910,301,718Asymmetric pedestal/carrier ring arrangement for edge impedance modulation201910,287,683Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region201910,157,755Purge and pumping structures arranged beneath substrate plane to reduce defects201810,128,116Integrated direct dielectric and metal deposition201810,128,160Systems and methods for detection of plasma instability by electrical measurement201810,020,188Method for depositing ALD films using halide-based precursors20189,997,422Systems and methods for frequency modulation of radiofrequency power supply for controlling plasma instability20189,970,108Systems and methods for vapor delivery in a substrate processing system20189,870,917'Variable temperature hardware and methods for reduction of wafer backside deposition'20189,824,884'Method for depositing metals free ald silicon nitride films using halide-based precursors'20179,824,941'Systems and methods for detection of plasma instability by electrical measurement'20179,758,868'Plasma suppression behind a showerhead through the use of increased pressure'20179,698,042'Wafer centering in pocket to improve azimuthal thickness uniformity at wafer edge'20179,677,176'Multi-plenum, dual-temperature showerhead'20179,631,276'Systems and methods enabling low defect processing via controlled separation and delivery of chemicals during atomic layer deposition'20179,490,149'Chemical deposition apparatus having conductance control'20169,388,494'Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region'20169,334,566'Multi-tray ballast vapor draw systems'20169,236,244'Sequential precursor dosing in an ALD multi-station/batch reactor'20169,230,800'Plasma activated conformal film deposition'20168,985,152'Point of use valve manifold for semiconductor fabrication equipment'20158,940,646'Sequential precursor dosing in an ALD multi-station/batch reactor'20158,728,956'Plasma activated conformal film deposition'2014Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2014–2017Patents assigned to NOVELLUS SYSTEMS INC (5)· patent assignee history
2014–2015Patents assigned to CHANDRASEKHARAN RAMESH (2)· patent assignee history
2014Patents assigned to DORSH TOM (1)· patent assignee history
2014Patents assigned to HAUSMANN DENNIS M (1)· patent assignee history
2014–2021Based in Portland, OR, US· patent location history
2015–2021Patents assigned to LAM RES CORP (30)· patent assignee history
2015Based in Tualatin, OR, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LAM RES CORP | 30 | 2015–2021 |
| NOVELLUS SYSTEMS INC | 5 | 2014–2017 |
| CHANDRASEKHARAN RAMESHself | 2 | 2014–2015 |
| DORSH TOM | 1 | 2014 |
| HAUSMANN DENNIS M | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Portland, OR, US | 34 | 2014–2021 |
| Tualatin, OR, US | 1 | 2015 |