Inventor

Sheng-Chen Chung

Inventor
Jhubei City, TW

Overview

41→
Patents
2009–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 41 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices54%
H01LSemiconductor devices19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
B29CShaping or joining of plastics1%
B29KIndexing scheme associated with subclasses b29b, b29c or b29d, relating to moulding materials or to materials for moulds, reinforcements, fillers or preformed parts, e.g. inserts1%
C08FMacromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds1%
C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients1%
C08LCompositions of macromolecular compounds1%
H10BElectronic memory devices1%
PatentTitleYear
10,988,604Method of preparing diene-based rubber latex, method of preparing ABS-based graft copolymer and method of manufacturing injection-molded article202110,658,492Polysilicon design for replacement gate technology202010,403,736Polysilicon design for replacement gate technology201910,084,061Polysilicon design for replacement gate technology20189,929,251'Polysilicon design for replacement gate technology'20189,711,415'Device for high-K and metal gate stacks'20179,679,988'Polysilicon design for replacement gate technology'20179,620,620'Methods to stop contact metal from extruding into replacement gates'20179,349,655'Method for mechanical stress enhancement in semiconductor devices'20169,209,089'Method of fabricating a metal gate semiconductor device'20159,142,414'CMOS devices with metal gates and methods for forming the same'20159,093,559'Method of hybrid high-k/metal-gate stack fabrication'20158,890,260'Polysilicon design for replacement gate technology'20148,853,753'Contact for high-k metal gate device'20148,796,084'Method for removing hard masks on gates in semiconductor manufacturing process'20148,716,103'Semiconductor device and method of fabricating same'20148,546,227'Contact for high-K metal gate device'20138,525,270'Structures and methods to stop contact metal from extruding into replacement gates'20138,487,382'Device scheme of HKMG gate-last process'20138,461,629'Semiconductor device and method of fabricating same'20138,372,706'Semiconductor device fabrication method including hard mask and sacrificial spacer elements'20138,368,136'Integrating a capacitor in a metal gate last process'20138,334,572'Resistive device for high-k metal gate technology'20128,329,521'Method and device with gate structure formed over the recessed top portion of the isolation structure'20128,286,114'3-dimensional device design layout'20128,138,554'Semiconductor device with local interconnects'20128,105,891'Method for tuning a work function of high-K metal gate devices'20128,093,116'Method for N/P patterning in a gate last process'20128,058,119'Device scheme of HKMG gate-last process'20118,008,145'High-K metal gate structure fabrication method including hard mask'20117,998,830'Semiconductor device with both I/O and core components and method of fabricating same'20117,939,392'Method for gate height control in a gate last process'20117,927,943'Method for tuning a work function of high-k metal gate devices'20117,898,037'Contact scheme for MOSFETs'20117,868,361'Semiconductor device with both I/O and core components and method of fabricating same'20117,833,848'Method for removing hard masks on gates in semiconductor manufacturing process'20107,812,379'SOI devices'20107,803,674'Methods for fabricating SOI devices'20107,678,636'Selective formation of stress memorization layer'20107,632,729'Method for semiconductor device performance enhancement'20097,550,795'SOI devices and methods for fabricating the same'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (32)· patent assignee history
2009–2014Based in Hsinchu, TW· patent location history
2011–2017Patents assigned to CHUNG SHENG-CHEN (19)· patent assignee history
2011–2016Patents assigned to THEI KONG-BENG (12)· patent assignee history
2011–2014Patents assigned to CHUANG HARRY (11)· patent assignee history
2011–2017Based in Jhubei City, TW· patent location history
2017–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (7)· patent assignee history
2017–2020Based in Tainan, TW· patent location history
2021Based in Daejeon, KR· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG322009–2016
CHUNG SHENG-CHENself192011–2017
THEI KONG-BENG122011–2016
CHUANG HARRY112011–2014
TAIWAN SEMICONDUCTOR MFG CO LTD72017–2020
Locations
LocationPatentsSpan
Jhubei City, TW222011–2017
Hsinchu, TW132009–2014
Tainan, TW52017–2020
Daejeon, KR12021