Inventor

William J. Dally

Inventor

Stanford, CA, US

Overview

1989–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 191 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H04Lprimary

H04LTransmission of digital information, e.g. telegraphic communication23%

G06FElectric digital data processing19%

H03KPulse technique10%

H04BTransmission8%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%

G11CStatic stores5%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%

G05FSystems for regulating electric or magnetic variables3%

H04JMultiplex communication3%

G06NComputing arrangements based on specific computational models2%

PatentTitleYear

11,070,205Glitch-free multiplexer2021 10,997,496Sparse convolutional neural network accelerator2021 10,891,538Sparse convolutional neural network accelerator2021 10,860,922Sparse convolutional neural network accelerator2020 10,623,217Proportional AC-coupled edge-boosting transmit equalization for multi-level pulse-amplitude modulated signaling2020 10,528,864Sparse convolutional neural network accelerator2020 10,505,451Variable frequency soft-switching control of a buck converter2019 10,361,023Magnetic power coupling to an integrated circuit module2019 10,224,813Variable frequency soft-switching control of a buck converter2019 10,153,985Dragonfly processor interconnect network2018 10,128,904Low-latency bi-directional repeater2018 10,096,134Data compaction and memory bandwidth reduction for sparse neural networks2018 10,063,481Network endpoint congestion management2018 10,056,862Photovoltaic system protection2018 10,026,468DRAM with segmented word line switching circuit for causing selection of portion of rows and circuitry for a variable page width control scheme2018 9,928,104'System, method, and computer program product for a two-phase queue'2018 9,886,409'System and method for configuring a channel'2018 9,804,621'Current-parking switching regulator downstream controller pre-driver'2017 9,800,158'Current-parking switching regulator downstream controller'2017 9,685,789'Current diversion for power-providing systems'2017 9,660,599'Radio frequency power amplifier including a pulse generator and matching network circuit'2017 9,647,857'Digital transmitter'2017 9,639,102'Predictive current sensing'2017 9,614,786'Dragonfly processor interconnect network'2017 9,594,700'Speculative memory controller'2017 9,519,507'Executing an instruction of currently active thread before context switch upon receiving inactive context ID to be activated'2016 9,484,815'Energy-based control of a switching regulator'2016 9,477,477'System, method, and computer program product for executing casting-arithmetic instructions'2016 9,471,091'Periodic synchronizer using a reduced timing margin to generate a speculative synchronized output signal that is either validated or recalled'2016 9,459,635'Current-parking switching regulator upstream controller'2016 9,460,776'SRAM voltage assist'2016 9,419,824'Digital transmitter'2016 9,395,738'Current-parking switching regulator with a split inductor'2016 9,389,617'Pulsed current sensing'2016 9,338,036'Data-driven charge-pump transmitter for differential signaling'2016 9,323,774'Compressed pointers for cell structures'2016 9,287,778'Current parking response to transient load demands'2016 9,251,870'Ground-referenced single-ended memory interconnect'2016 9,235,392'System, method, and computer program product for improved power efficiency during program code execution'2016 9,231,477'Control of a soft-switched variable frequency buck regulator'2016 9,224,449'Variable dynamic memory refresh'2015 9,208,900'System and method for performing address-based SRAM access assists'2015 9,201,434'Multiphase current-parking switching regulator'2015 9,178,421'Multi-stage power supply with fast transient response'2015 9,171,607'Ground-referenced single-ended system-on-package'2015 9,170,980'Ground-referenced single-ended signaling connected graphics processing unit multi-chip module'2015 9,164,134'High-resolution phase detector'2015 9,153,314'Ground-referenced single-ended memory interconnect'2015 9,153,539'Ground-referenced single-ended signaling connected graphics processing unit multi-chip module'2015 9,147,447'Ground-referenced single-ended memory interconnect'2015 9,106,235'Mesochronous synchronizer with delay-line phase detector'2015 9,077,329'Latch circuit with a bridging device'2015 9,076,551'Multi-phase ground-referenced single-ended signaling'2015 9,071,244'Ground referenced single-ended signaling'2015 9,069,664'Unified streaming multiprocessor memory'2015 9,069,684'System, method, and computer program product for invalidatng cache lines'2015 9,058,453'System and method for configuring a channel'2015 9,047,093'Data transfer bus communication to receive data by sending request instruction attached with identifier indicating processor and thread context identities'2015 9,025,456'Speculative reservation for routing networks'2015 8,989,303'Digital transmitter'2015 8,982,140'Hierarchical memory addressing'2015 8,959,292'Atomic memory access hardware implementations'2015 8,941,430'Timing calibration for on-chip interconnect'2015 8,930,862'System, method, and computer program product for automatic two-phase clocking'2015 8,923,433'Digital transmitter'2014 8,879,681'System and method for determining a time for safely sampling a signal of a clock domain'2014 8,866,511'Matrix phase detector'2014 8,854,123'On-package multiprocessor ground-referenced single-ended interconnect'2014 8,841,953'Low clock energy double-edge-triggered flip-flop circuit'2014 8,832,671'Conflict-free register allocation'2014 8,786,345'Single-trigger low-energy flip-flop circuit'2014 8,788,761'System and method for explicitly managing cache coherence'2014 8,761,235'Digital transmitter'2014 8,760,204'Variation-tolerant periodic synchronizer'2014 8,742,796'Low energy flip-flops'2014 8,732,711'Two-level scheduler for multi-threaded processing'2014 8,689,159'Redundancy for on-chip interconnect'2014 8,681,837'Digital Transmitter'2014 8,674,768'Signaling system with low-power automatic gain control'2014 8,659,337'Latch circuit with a bridging device'2014 8,611,437'Ground referenced single-ended signaling'2013 8,604,857'Power supply-insensitive buffer and oscillator circuit'2013 8,604,855'Dual-trigger low-energy flip-flop circuit'2013 8,559,248'Clamped bit line read circuit'2013 8,555,035'Conflict-free register allocation using a multi-bank register file with input operand alignment'2013 8,487,681'Dual-trigger low-energy flip-flop circuit'2013 8,436,669'Single-trigger low-energy flip-flop circuit'2013 8,428,207'System and method for determining a time for safely sampling a signal of a clock domain'2013 8,412,917'Data exchange and communication between execution units in a parallel processor'2013 8,373,483'Low-clock-energy, fully-static latch circuit'2013 8,325,715'Internet switch router'2012 8,311,147'Digital transmitter'2012 8,285,789'Flattened butterfly processor interconnect network'2012 8,259,841'Digital transmitter'2012 8,254,491'Digital transmitter'2012 8,243,847'Digital transmitter'2012 8,238,467'Digital transmitter'2012 8,238,470'Digital transmitter'2012 8,233,567'Method and apparatus for data recovery'2012 8,228,930'Interconnection network router arrangements and methods therefor'2012 8,184,626'High-radix interprocessor communications system and method'2012 8,122,078'Processor with enhanced combined-arithmetic capability'2012 8,102,212'Signaling system with low-power automatic gain control'2012 8,024,553'Data exchange and communication between execution units in a parallel processor'2011 7,924,963'Digital Transmit phase trimming'2011 7,920,555'Composite trunking'2011 7,864,792'Load balancing for communications within a multiprocessor computer system'2011 7,818,539'System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values'2010 7,786,816'Phase controlled oscillator circuit with input signal coupler'2010 7,782,138'Signaling system with low-power automatic gain control'2010 7,760,747'Apparatus and method for packet scheduling'2010 7,715,494'Digital transmitter'2010 7,707,384'System and method for re-ordering memory references for access to memory'2010 7,706,464'Digital transmitter'2010 7,683,680'Combined phase comparator and charge pump circuit'2010 7,668,890'Prefix search circuitry and method'2010 7,633,940'Load-balanced routing'2009 7,627,069'Digital transmit phase trimming'2009 7,602,858'Digital transmitter'2009 7,602,857'Digital transmitter'2009 7,580,474'Digital transmitter'2009 7,564,920'Digital transmitter'2009 7,529,915'Context switching processor with multiple context control register sets including write address register identifying destination register for waiting context to store returned data from external source'2009 7,526,046'Digital transmitter'2009 7,498,882'Signaling system with low-power automatic gain control'2009 7,495,513'Signaling system with low-power automatic gain control'2009 7,489,739'Method and apparatus for data recovery'2009 7,460,565'Data communications circuit with multi-stage multiplexing'2008 7,414,489'Phase controlled oscillator circuit with input signal coupler'2008 7,408,959'Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric'2008 7,401,205'High performance RISC instruction set digital signal processor having circular buffer and looping controls'2008 7,301,941'Multistage digital cross connect with synchronized configuration switching'2007 7,292,580'Method and system for guaranteeing quality of service in a multi-plane cell switch'2007 7,292,594'Weighted fair share scheduler for large input-buffered high-speed cross-point packet/cell switches'2007 7,268,706'Low power, DC-balanced serial link transmitter'2007 7,260,092'Time slot interchanger'2007 7,257,183'Digital clock recovery circuit'2007 7,216,214'System and method for re-ordering memory references for access to memory'2007 7,199,728'Communication system with low power, DC-balanced serial link'2007 7,187,721'Transition-time control in a high-speed data transmitter'2007 7,187,679'Internet switch router'2007 7,162,615'Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch'2007 7,130,847'Prefix search method'2006 7,099,404'Digital transmitter'2006 7,100,026'System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values'2006 7,088,270'Low power, DC-balanced serial link'2006 7,078,979'Phase controlled oscillator circuit with input signal coupler'2006 7,061,406'Low power, DC-balanced serial link transmitter'2006 7,047,391'System and method for re-ordering memory references for access to memory'2006 7,043,562'Irregular network'2006 6,976,064'Apparatus and methods for connecting modules using remote switching'2005 6,965,299'High-speed, low-power crossbar switch'2005 6,952,431'Clock multiplying delay-locked loop for data communications'2005 6,937,073'Frequency multiplier with phase comparator'2005 6,934,471'Photonic switch using time-slot interchange'2005 6,891,834'Apparatus and method for packet scheduling'2005 6,870,838'Multistage digital cross connect with integral frame timing'2005 6,861,916'Phase controlled oscillator circuit with input signal coupler'2005 6,807,186'Architectures for a single-stage grooming switch'2004 6,728,240'Serial-link circuit including capacitive offset adjustment of a high-speed receiver'2004 6,717,942'Space-efficient source routing'2004 6,674,772'Data communications circuit with multi-stage multiplexing'2004 6,654,381'Methods and apparatus for event-driven routing'2003 6,617,936'Phase controlled oscillator'2003 6,614,268'High-speed, low-power inter-chip transmission system'2003 6,606,656'Apparatus and methods for connecting modules using remote switching'2003 6,598,145'Irregular network'2003 6,563,831'Router with virtual channel allocation'2003 6,542,555'Digital transmitter with equalization'2003 6,522,632'Apparatus and method for efficient prefix search'2003 6,476,656'Low-power low-jitter variable delay timing circuit'2002 6,430,527'Prefix search circuitry and method'2002 6,426,656'High speed, low-power inter-chip transmission system'2002 6,370,145'Internet switch router'2002 6,359,879'Composite trunking'2002 6,316,987'Low-power low-jitter variable delay timing circuit'2001 6,285,679'Methods and apparatus for event-driven routing'2001 6,275,072'Combined phase comparator and charge pump circuit'2001 6,269,435'System and method for implementing conditional vector operations in which an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector'2001 6,266,379'Digital transmitter with equalization'2001 6,205,532'Apparatus and methods for connecting modules using remote switching'2001 6,192,384'System and method for performing compound vector operations'2001 6,003,123'Memory system with global address translation'1999 5,845,331'Memory system including guarded pointers'1998 5,574,939'Multiprocessor coupling system with integrated compile and run time scheduling for parallelism'1996 5,475,857'Express channels for diminishing latency and increasing throughput in an interconnection network'1995 5,367,642'System of express channels in an interconnection network that automatically bypasses local channel addressable nodes'1994 5,212,778'Message-driven processor in a concurrent computer'1993 5,093,920'Programmable processing elements interconnected by a communication network including field operation unit for performing field operations'1992 4,933,933'Torus routing chip'1990 4,817,432'Digital ultrasonic instrument for ophthalmic use'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2017Patents assigned to MASSACHUSETTS INST TECHNOLOGY (32)· patent assignee history

1993–1999Based in Framingham, MA, US· patent location history

2001–2018Patents assigned to UNIV LELAND STANFORD JUNIOR (16)· patent assignee history

2001–2016Based in Stanford, CA, US· patent location history

2005–2014Patents assigned to RAMBUS INC (23)· patent assignee history

2006–2018Based in Palo Alto, CA, US· patent location history

2012–2016Patents assigned to DALLY WILLIAM J (25)· patent assignee history

2013–2021Patents assigned to NVIDIA CORP (73)· patent assignee history

2013–2021Based in Los Altos Hills, CA, US· patent location history

2020–2021Based in Incline Village, NV, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
NVIDIA CORP	73	2013–2021
MASSACHUSETTS INST TECHNOLOGY	32	1993–2017
DALLY WILLIAM Jself	25	2012–2016
RAMBUS INC	23	2005–2014
UNIV LELAND STANFORD JUNIOR	16	2001–2018

Locations

Location	Patents	Span
Stanford, California, US	111	2001–2016
Los Altos Hills, California, US	61	2013–2021
Palo Alto, California, US	7	2006–2018
Framingham, Massachusetts, US	6	1993–1999
Incline Village, NV, US	3	2020–2021