Inventor
Paul S. Diefenbaugh
Inventor
Portland, OR, US
Overview
Patents· 87 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing38%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use24%
G09GArrangements or circuits for control of indicating devices using static means to present variable information14%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications8%
G06TImage data processing or generation, in general6%
H04NPictorial communication, e.g. television6%
G02BOptical elements, systems or apparatus2%
G11BInformation storage based on relative movement between record carrier and transducer1%
H04LTransmission of digital information, e.g. telegraphic communication1%
PatentTitleYear
11,132,048User attention-based user experience202111,043,158Video bandwidth optimization for multi-monitor systems202111,017,712Optimized display image rendering202110,951,792Devices and methods for selective display frame fetch202110,891,887Frame-level resynchronization between a display panel and a display source device for full and partial frame updates202110,846,815Policies and architecture to dynamically offload VR processing to HMD based on external cues202010,824,216Apparatus and methods for reduced computing device power consumption202010,771,795Switchable chroma sampling for wireless display202010,761,585Techniques and system for managing activity in multicomponent platform202010,754,456Power-efficient touch input processing202010,643,525Dynamic sleep for a display panel202010,613,814Low latency wireless display202010,606,343Keyboard for virtual reality202010,573,079Hybrid rendering for a wearable display attached to a tethered computer202010,545,787Techniques to compose memory resources across devices202010,516,812Devices and methods for selective display frame fetch201910,504,272Apparatus and method for optimizing time/space warp for virtual reality using dynamic tiling and dirty tile marking201910,475,149Policies and architecture to dynamically offload VR processing to HMD based on external cues201910,417,149Self-aligning a processor duty cycle with interrupts201910,356,439Flexible frame referencing for display transport201910,345,889Forcing a processor into a low power state201910,339,023Cache-aware adaptive thread scheduling and migration201910,275,260Collaborative processor and system performance and power management201910,225,536Dynamic fidelity updates for encoded displays201910,219,002Dynamic fidelity updates for encoded displays201910,185,385Method and apparatus to reduce idle link power in a platform201910,175,740Mapping a performance request to an operating frequency in a processor201910,115,223Graphics apparatus including a parallelized macro-pipeline201810,114,441Techniques and system for managing activity in multicomponent platform201810,108,433Collaborative processor and system performance and power management201810,068,553Enhanced rendering by a wearable display attached to a tethered computer201810,025,372Techniques for managing system power using deferred graphics rendering201810,007,528Computing platform interface with memory management201810,007,321Enhancing power-performance efficiency in a computer system when bursts of activity occurs when operating in low power20189,928,660'Hybrid rendering for a wearable display attached to a tethered computer'20189,872,028'Wireless display adaptations and optimizations based on unfiltered and regional feedback'20189,832,521Latency and efficiency for remote display of non-media content20179,798,574'Techniques to compose memory resources across devices'20179,778,720'PCIE device power state control'20179,760,158'Forcing a processor into a low power state'20179,710,043'Controlling a guaranteed frequency of a processor'20179,684,541'Method and apparatus for determining thread execution parallelism'20179,619,411'Polling determination'20179,600,058'Enhancing power-performance efficiency in a computer system when bursts of activity occurs when operating in low power'20179,494,998'Rescheduling workloads to enforce and maintain a duty cycle'20169,454,379'Collaborative processor and system performance and power management'20169,442,739'Collaborative processor and system performance and power management'20169,442,558'Techniques and system for managing activity in multicomponent platform'20169,367,116'Apparatus to reduce idle link power in a platform'20169,348,401'Mapping a performance request to an operating frequency in a processor'20169,280,198'Method and apparatus to reduce idle link power in a platform'20169,269,121'Techniques for managing system power using deferred graphics rendering'20169,223,379'Intelligent receive buffer management to optimize idle state residency'20159,213,390'Periodic activity alignment'20159,195,285'Techniques for platform duty cycling'20159,177,534'Data transmission for display partial update'20159,110,735'Managing performance policies based on workload scalability'20159,058,422'Polling determination'20159,052,893'Various methods and apparatuses for power states in a controller'20159,030,482'Hybrid display frame buffer for display subsystem'20159,026,816'Method and system for determining an energy-efficient operating point of a platform'20159,015,510'Optimizing energy efficiency using device idle duration information and latency tolerance based on a pre-wake configuration of a platform associated to the device'20158,949,636'Power efficient flow control model for USB asynchronous transfers'20158,862,906'Control of platform power consumption using coordination of platform power management and display power management'20148,823,721'Techniques for aligning frame data'20148,689,028'Method and apparatus to reduce idle link power in a platform'20148,643,658'Techniques for aligning frame data'20148,631,257'Platform power management based on latency guidance'20148,527,785'Transitioning a computing platform to a low power system state'20138,285,909'Hardware assisted endpoint idleness detection for USB host controllers'20128,185,758'Method and system for determining an energy-efficient operating point of a platform'20128,176,341'Platform power management based on latency guidance'20127,849,251'Hardware assisted endpoint idleness detection for USB host controllers'20107,849,334'Transitioning a computing platform to a low power system state'20107,774,520'Method and apparatus for maintaining synchronization of audio in a computing system'20107,742,032'Image adaptation phase-in'20107,631,199'Various methods and apparatuses for power states in a controller'20097,568,057'Method and apparatus for maintaining synchronization of audio in a computing system'20097,549,177'Advanced thermal management using an average power controller over an adjustable time window'20097,519,839'Method for optimizing platform power delivery'20097,490,255'Power efficient flow control model for USB asynchronous transfers'20097,484,108'Enhancing power delivery with transient running average power limits'20097,430,673'Power management system for computing platform'20087,281,074'Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notifications'20077,259,769'Dynamic backlight and image adjustment using gamma correction'20077,233,309'Coordinating backlight frequency and refresh rate in a panel display'20077,231,532'Generating notifications by powered-down devices'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2021Patents assigned to INTEL CORP (87)· patent assignee history
2007–2021Based in Portland, OR, US· patent location history
2007–2010Based in Beaverton, OR, US· patent location history
2012–2018Patents assigned to DIEFENBAUGH PAUL S (14)· patent assignee history
2012–2015Patents assigned to DIEFENBAUGH PAUL (5)· patent assignee history
2012–2018Patents assigned to HENROID ANDREW D (5)· patent assignee history
2014–2015Patents assigned to HAN KYUNGTAE (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 87 | 2007–2021 |
| DIEFENBAUGH PAUL Sself | 14 | 2012–2018 |
| DIEFENBAUGH PAULself | 5 | 2012–2015 |
| HENROID ANDREW D | 5 | 2012–2018 |
| HAN KYUNGTAE | 4 | 2014–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Portland, OR, US | 83 | 2007–2021 |
| Beaverton, OR, US | 4 | 2007–2010 |