LexDanaLexDanabeta
Inventor

Marie Denison

Inventor
Plano, TX, US

Overview

71→
Patents
2005–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 71 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices35%
H01LSemiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
A61BDiagnosis2%
A61JContainers specially adapted for medical or pharmaceutical purposes2%
H03KPulse technique1%
H10NElectric solid-state devices not otherwise provided for1%
G06FElectric digital data processing1%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems1%
PatentTitleYear
10,811,530Trench gate trench field plate vertical mosfet202010,535,731Lateral MOSFET with buried drain extension layer202010,468,324Integration of heat spreader for beol thermal management201910,128,219Multi-chip module including stacked power devices with metal clip201810,062,777Trench gate trench field plate vertical MOSFET20189,985,095Lateral MOSFET with buried drain extension layer20189,947,784High voltage lateral extended drain MOS transistor with improved drift layer contact20189,831,320High voltage lateral DMOS transistor with optimized source-side blocking capability20179,806,190'High voltage drain extension on thin buried oxide SOI'20179,793,375'High voltage lateral DMOS transistor with optimized source-side blocking capability'20179,698,075'Integration of backside heat spreader for thermal management'20179,660,021'Trench gate trench field plate vertical MOSFET'20179,653,388'Integrating multi-output power converters having vertically stacked semiconductor chips'20179,577,033'Trench gate trench field plate vertical MOSFET'20179,543,149'High voltage lateral extended drain MOS transistor with improved drift layer contact'20179,508,869'High voltage depletion mode N-channel JFET'20169,496,198'Integration of backside heat spreader for thermal management'20169,397,211'Lateral MOSFET with buried drain extension layer'20169,397,023'Integration of heat spreader for beol thermal management'20169,373,571'Integrating multi-output power converters having vertically stacked semiconductor chips'20169,355,991'Integrating multi-output devices having vertically stacked semiconductor chips'20169,299,832'High voltage lateral DMOS transistor with optimized source-side blocking capability'20169,294,082'Circuit for current sensing in high-voltage transistor'20169,240,465'Trench gate trench field plate semi-vertical semi-lateral MOSFET'20169,240,446'Vertical trench MOSFET device in integrated power technologies'20169,224,854'Trench gate trench field plate vertical MOSFET'20159,214,415'Integrating multi-output power converters having vertically stacked semiconductor chips'20159,202,692'High voltage depletion mode N-channel JFET'20159,136,368'Trench gate trench field plate semi-vertical semi-lateral MOSFET'20159,123,802'Vertical trench MOSFET device in integrated power technologies'20159,076,671'Power integrated circuit including series-connected source substrate and drain substrate power mosfets'20158,928,075'Power integrated circuit including series-connected source substrate and drain substrate power MOSFETs'20158,890,579'Circuit for current sensing in high-voltage transistor'20148,878,330'Integrated high voltage divider'20148,878,283'Quasi-vertical gated NPN-PNP ESD protection device'20148,872,273'Integrated gate controlled high voltage divider'20148,866,263'Emitter ballasting by contact area segmentation in ESD bipolar based semiconductor component'20148,853,029'Method of making vertical transistor with graded field plate dielectric'20148,766,359'Lateral superjunction extended drain MOS transistor'20148,754,497'Strained LDMOS and demos'20148,749,024'Stacked ESD clamp with reduced variation in clamp voltage'20148,723,241'MEMS device fabricated with integrated circuit'20148,648,416'LDMOS sense transistor structure for current sensing at high voltage'20148,643,099'Integrated lateral high voltage MOSFET'20148,617,960'Silicon microphone transducer'20138,598,008'Stacked ESD clamp with reduced variation in clamp voltage'20138,581,660'Power transistor partial current sensing for high precision applications'20138,580,650'Lateral superjunction extended drain MOS transistor'20138,575,015'Lateral trench mosfet having a field plate'20138,496,842'MEMS device fabricated with integrated circuit'20138,492,233'Configurable NP channel lateral drain extended MOS-based transistor'20138,476,127'Integrated lateral high voltage MOSFET'20138,471,337'Integrated circuit'20138,429,592'N/P configurable LDMOS subcircuit macro model'20138,426,281'Lateral metal oxide semiconductor drain extension design'20138,253,193'MOS transistor with gate trench adjacent to drain extension field insulation'20128,173,510'Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric'20128,124,482'MOS transistor with gate trench adjacent to drain extension field insulation'20128,004,051'Lateral trench MOSFET having a field plate'20117,989,853'Integration of high voltage JFET in linear bipolar CMOS process'20117,968,936'Quasi-vertical gated NPN-PNP ESD protection device'20117,939,863'Area efficient 3D integration of low noise JFET and MOS in linear bipolar CMOS process'20117,915,676'Integrated circuit'20117,893,499'MOS transistor with gate trench adjacent to drain extension field insulation'20117,888,732'Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric'20117,883,973'Method of forming semiconductor wells'20117,847,351'Lateral metal oxide semiconductor drain extension design'20107,786,507'Symmetrical bi-directional semiconductor ESD protection device'20107,671,408'Vertical drain extended MOSFET transistor with vertical trench field plate'20107,253,474'Quasi-vertical semiconductor component'20076,911,696'LDMOS transistor'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2013Patents assigned to INFINEON TECHNOLOGIES AG (4)· patent assignee history
2005–2007Based in München, DE· patent location history
2010–2020Patents assigned to TEXAS INSTRUMENTS INC (67)· patent assignee history
2010–2020Based in Plano, TX, US· patent location history
2011–2013Based in Munich, DE· patent location history
2012–2017Patents assigned to DENISON MARIE (24)· patent assignee history
2012–2017Patents assigned to PENDHARKAR SAMEER (10)· patent assignee history
2013–2017Patents assigned to HOWER PHILIP L (5)· patent assignee history
2018–2020Based in Sunnyvale, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TEXAS INSTRUMENTS INC672010–2020
DENISON MARIEself242012–2017
PENDHARKAR SAMEER102012–2017
HOWER PHILIP L52013–2017
INFINEON TECHNOLOGIES AG42005–2013
Locations
LocationPatentsSpan
Plano, Texas, US642010–2020
Sunnyvale, California, US32018–2020
Munich, DE22011–2013
München, DE22005–2007