Inventor

Albert M. Young

Inventor
Fishkill, NY, US

Overview

27→
Patents
2000–2018
Patent span
Electricity
Primary field (CPC H)

Patents· 27 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1030%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10DInorganic electric semiconductor devices11%
H03FAmplifiers9%
H10NElectric solid-state devices not otherwise provided for9%
G01RMeasuring electric variables4%
G06FElectric digital data processing4%
G11CStatic stores4%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H10BElectronic memory devices4%
PatentTitleYear
9,887,623'Efficient voltage conversion'20189,755,506'Efficient voltage conversion'20178,962,448'Computer readable medium encoded with a program for fabricating 3D integrated circuit device using interface wafer as permanent carrier'20158,828,800'Method of forming adaptive interconnect structure having programmable contacts'20148,664,081'Method for fabricating 3D integrated circuit device using interface wafer as permanent carrier'20148,546,188'Bow-balanced 3D chip stacking'20138,492,869'3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer'20138,399,336'Method for fabricating a 3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer'20138,298,914'3D integrated circuit device fabrication using interface wafer as permanent carrier'20128,174,841'Adaptive interconnect structure'20127,999,377'Method and structure for optimizing yield of 3-D chip manufacture'20117,913,202'Wafer level I/O test, repair and/or customization enabled by I/O layer'20117,888,164'Programmable via structure and method of fabricating same'20117,847,597'Precision frequency change detector'20107,786,596'Hermetic seal and reliable bonding structures for 3D applications'20107,737,003'Method and structure for optimizing yield of 3-D chip manufacture'20107,732,798'Programmable via structure for three dimensional integration technology'20107,683,478'Hermetic seal and reliable bonding structures for 3D applications'20107,652,278'Programmable via structure and method of fabricating same'20107,545,667'Programmable via structure for three dimensional integration technology'20097,528,056'Low-cost strained SOI substrate for high-performance CMOS technology'20097,521,950'Wafer level I/O test and repair enabled by I/O layer'20097,256,649'Multiple signal intermodulation reduction system'20077,129,783'Hybrid active combiner and circulator'20066,396,298'Active feedback pulsed measurement method'20026,177,836'Feed forward linearized traveling wave tube'20016,127,899'High frequency anharmonic oscillator for the generation of broadband deterministic noise'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2010Patents assigned to AEROSPACE CORP (6)· patent assignee history
2000–2010Based in Whittier, CA, US· patent location history
2009–2018Patents assigned to IBM (21)· patent assignee history
2009–2018Based in Fishkill, NY, US· patent location history
2012–2015Patents assigned to YOUNG ALBERT M (8)· patent assignee history
2012–2015Patents assigned to LIU FEI (6)· patent assignee history
2012–2015Patents assigned to YU ROY R (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM212009–2018
YOUNG ALBERT Mself82012–2015
AEROSPACE CORP62000–2010
LIU FEI62012–2015
YU ROY R62012–2015
Locations
LocationPatentsSpan
Fishkill, New York, US212009–2018
Whittier, California, US62000–2010