Inventor
Amit Sanghani
Inventor
San Jose, CA, US
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G01Rprimary
G01RMeasuring electric variables55%
G06FElectric digital data processing26%
G11CStatic stores18%
PatentTitleYear
10,545,189Granular dynamic test systems and methods202010,481,203Granular dynamic test systems and methods201910,473,720Dynamic independent test partition clock201910,451,676Method and system for dynamic standard test access (DSTA) for a logic block reuse201910,444,280Independent test partition clock coordination across multiple test partitions201910,317,463Scan system interface (SSI) module201910,281,524Test partition external input/output interface control for test partitions in a semiconductor201910,241,148Virtual access of input/output (I/O) for test via an on-chip star network20199,885,753'Scan systems and methods'20189,829,536Performing on-chip partial good die identification20179,500,706'Hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture support'20169,395,414'System for reducing peak power during scan shift at the local level for scan based tests'20169,377,510'System for reducing peak power during scan shift at the global level for scan based tests'20169,222,981'Global low power capture scheme for cores'20158,943,457'Simulating scan tests with reduced resources'20158,522,190'Power droop reduction via clock-gating for at-speed scan testing'20137,305,598'Test clock generation for higher-speed testing of a semiconductor device'20076,816,991'Built-in self-testing for double data rate input/output'20046,629,277'LSSD interface'20036,629,275'Reinstate apparatus and method to recreate data background for testing SRAM'20036,477,684'Automatic test pattern generation modeling for LSSD to interface with Muxscan'20026,047,386'Apparatus for scan test of SRAM for microprocessors having full scan capability'20006,014,762'Method and apparatus for scan test of SRAM for microprocessor without full scan capability'20005,923,835'Method for scan test of SRAM for microprocessors having full scan capability'19995,896,396'Method and apparatus for scan test of SRAM for microprocessors without full scan capability'19995,881,218'Apparatus for scan test of SRAM for microprocessors having full scan capability'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2004Patents assigned to SUN MICROSYSTEMS INC (9)· patent assignee history
1999–2015Based in Santa Clara, CA, US· patent location history
2002–2020Based in San Jose, CA, US· patent location history
2007–2013Patents assigned to SANGHANI AMIT (2)· patent assignee history
2007Patents assigned to MANELA PHILIP (1)· patent assignee history
2013–2020Patents assigned to NVIDIA CORP (16)· patent assignee history
2015Patents assigned to KISHORE PUNIT (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NVIDIA CORP | 16 | 2013–2020 |
| SUN MICROSYSTEMS INC | 9 | 1999–2004 |
| SANGHANI AMITself | 2 | 2007–2013 |
| KISHORE PUNIT | 1 | 2015 |
| MANELA PHILIP | 1 | 2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 20 | 2002–2020 |
| Santa Clara, California, US | 6 | 1999–2015 |