Inventor

Jesus Corbal

Inventor

Barcelona, ES

Overview

2009–2021

Patent span

Physics

Primary field (CPC G)

Patents· 91 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing81%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%

H03MCoding5%

G06TImage data processing or generation, in general2%

G05FSystems for regulating electric or magnetic variables1%

G06NComputing arrangements based on specific computational models1%

PatentTitleYear

11,093,247Systems and methods to load a tile register pair2021 11,093,277Systems, methods, and apparatuses for heterogeneous computing2021 11,086,623Systems, methods, and apparatuses for tile matrix multiplication and accumulation2021 11,080,048Systems, methods, and apparatus for tile configuration2021 11,074,073Apparatus and method for multiply, add/subtract, and accumulate of packed data elements2021 11,036,499Systems, apparatuses, and methods for controllable sine and/or cosine operations2021 11,023,231Systems and methods for executing a fused multiply-add instruction for complex numbers2021 11,023,235Systems and methods to zero a tile register pair2021 10,977,039Apparatus and method for performing dual signed and unsigned multiplication of packed data elements2021 10,909,259Instruction execution that broadcasts and masks data values at different levels of granularity2021 10,877,756Systems, methods, and apparatuses for tile diagonal2020 10,866,786Systems and methods for performing instructions to transpose rectangular tiles2020 10,853,065Systems, apparatuses, and methods for chained fused multiply add2020 10,846,087Systems, apparatuses, and methods for broadcast arithmetic operations2020 10,817,291Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator2020 10,802,826Apparatus and method for performing dual signed and unsigned multiplication of packed data elements2020 10,795,676Apparatus and method for multiplication and accumulation of complex and real packed data elements2020 10,795,677Systems, apparatuses, and methods for multiplication, negation, and accumulation of vector packed signed values2020 10,776,699Optimized compute hardware for machine learning operations2020 10,768,896Apparatus and method for processing fractional reciprocal operations2020 10,763,891Floating point to fixed point conversion2020 10,719,320Power noise injection to control rate of change of current2020 10,719,316Apparatus and method of improved packed integer permute instruction2020 10,705,839Apparatus and method for multiplying, summing, and accumulating sets of packed bytes2020 10,684,854Apparatus and method for converting a floating-point value from half precision to single precision2020 10,664,277Systems, apparatuses and methods for dual complex by complex conjugate multiply of signed words2020 10,664,237Apparatus and method for processing reciprocal square root operations2020 10,664,287Systems and methods for implementing chained tile operations2020 10,664,270Apparatus and method for vector multiply and accumulate of unsigned doublewords2020 10,656,942Fixed point to floating point conversion2020 10,649,772Method and apparatus for efficient matrix transpose2020 10,552,154Apparatus and method for multiplication and accumulation of complex and real packed data elements2020 10,514,924Apparatus and method for performing dual signed and unsigned multiplication of packed data elements2019 10,514,923Apparatus and method for vector multiply and accumulate of signed doublewords2019 10,496,407Apparatus and method for adding packed data elements with rotation and halving2019 10,489,154Apparatus and method for complex multiply and accumulate2019 10,481,910Apparatus and method for shifting quadwords and extracting packed words2019 10,474,463Apparatus and method for down conversion of data types2019 10,474,459Apparatus and method of improved permute instructions2019 10,467,185Apparatus and method of mask permute instructions2019 10,459,728Apparatus and method of improved insert instructions2019 10,452,394Apparatus and method for complex multiplication2019 10,318,298Apparatus and method for shifting quadwords and extracting packed words2019 10,282,296Zeroing a cache line2019 10,268,479Systems, apparatuses, and methods for broadcast compare addition2019 10,223,114Fixed point to floating point conversion2019 10,224,954Floating point to fixed point conversion2019 10,203,954Instruction and logic to provide conversions between a mask register and a general purpose register or memory2019 10,175,990Gathering and scattering multiple data elements2019 10,157,061Instructions for storing in general purpose registers one of two scalar constants based on the contents of vector write masks2018 10,146,535Systems, apparatuses, and methods for chained fused multiply add2018 10,133,577Vector mask driven clock gating for power efficiency of a processor2018 10,114,651Gathering and scattering multiple data elements2018 10,083,316Instruction execution that broadcasts and masks data values at different levels of granularity2018 10,037,205Instruction and logic to provide vector blend and permute functionality2018 10,037,208Multi-element instruction with different read and write masks2018 10,013,253Method and apparatus for performing a vector bit reversal2018 9,996,319Floating point (FP) add low instructions functional unit2018 9,996,320Fused multiply-add (FMA) low functional unit2018 9,983,873Systems, apparatuses, and methods for performing mask bit compression2018 9,946,540Apparatus and method of improved permute instructions with multiple granularities2018 9,904,548'Instruction and logic to perform a centrifuge operation'2018 9,792,115'Super multiply add (super MADD) instructions with three scalar terms'2017 9,766,886'Instruction and logic to provide vector linear interpolation functionality'2017 9,733,935'Super multiply add (super madd) instruction'2017 9,715,432'Memory fault suppression via re-execution and hardware FSM'2017 9,665,368'Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register'2017 9,658,850'Apparatus and method of improved permute instructions'2017 9,632,980'Apparatus and method of mask permute instructions'2017 9,619,236'Apparatus and method of improved insert instructions'2017 9,606,847'Enabling error detecting and reporting in machine check architecture'2017 9,588,764'Apparatus and method of improved extract instructions'2017 9,524,168'Apparatus and method for shuffling floating point or integer values'2016 9,513,918'Apparatus and method for performing permute operations'2016 9,495,162'Apparatus and method for performing a permute operation'2016 9,489,196'Multi-element instruction with different read and write masks'2016 9,442,733'Packed data operation mask comparison processors, methods, systems, and instructions'2016 9,430,389'Prefetch with request for ownership without data'2016 9,424,327'Instruction execution that broadcasts and masks data values at different levels of granularity'2016 9,411,592'Vector address conflict resolution with vector population count functionality'2016 9,411,584'Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality'2016 9,354,877'Systems, apparatuses, and methods for performing mask bit compression'2016 9,336,000'Instruction execution unit that broadcasts data values at different levels of granularity'2016 9,323,531'Systems, apparatuses, and methods for determining a trailing least significant masking bit of a writemask register'2016 9,218,182'Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op)'2015 8,996,923'Apparatus and method to obtain information regarding suppressed faults'2015 8,972,698'Vector conflict instructions'2015 8,707,012'Implementing vector memory operations'2014 8,447,962'Gathering and scattering multiple data elements'2013 8,316,216'Implementing vector memory operations'2012 7,627,735'Implementing vector memory operations'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009–2021Patents assigned to INTEL CORP (91)· patent assignee history

2009–2021Based in Barcelona, ES· patent location history

2012–2019Patents assigned to CORBAL JESUS (25)· patent assignee history

2013–2019Patents assigned to VALENTINE ROBERT (17)· patent assignee history

2013–2019Patents assigned to TOLL BRET L (14)· patent assignee history

2015–2017Patents assigned to OULD-AHMED-VALL ELMOUSTAPHA (12)· patent assignee history

2016–2019Based in Hillsboro, OR, US· patent location history

2018–2021Based in King City, OR, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	91	2009–2021
CORBAL JESUSself	25	2012–2019
VALENTINE ROBERT	17	2013–2019
TOLL BRET L	14	2013–2019
OULD-AHMED-VALL ELMOUSTAPHA	12	2015–2017

Locations

Location	Patents	Span
Barcelona, ES	43	2009–2021
King City, OR, US	39	2018–2021
Hillsboro, OR, US	9	2016–2019