Inventor
Zining Wu
Inventor
Los Altos, CA, US
Overview
Patents· 299 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Mprimary
H03MCoding34%
G11BInformation storage based on relative movement between record carrier and transducer26%
G11CStatic stores14%
G06FElectric digital data processing13%
H04LTransmission of digital information, e.g. telegraphic communication10%
H04BTransmission1%
H03FAmplifiers0%
H03HImpedance networks, e.g. resonant circuits0%
H03KPulse technique0%
G10LSpeech analysis techniques or speech synthesis0%
PatentTitleYear
10,817,372Systems and methods for ultra fast ECC with parity202010,719,394Systems and methods for fast access of non-volatile storage devices202010,715,182Systems and methods for decoding error correcting codes with self-generated LLR202010,707,411MRAM structure for efficient manufacturability202010,564,858Data storage device with selective connection to non-volatile memories20209,748,940'Pulse width modulation'20179,594,630'System and method for writing pilot data interspersed with user data for estimating disturbance experienced by user data'20179,583,137'Methods of demodulating a servo position error signal on patterned media'20179,554,208'Concurrent sound source localization of multiple speakers'20179,536,562'Method and apparatus for imitating a defect in a read-back signal received from a rotating storage medium'20179,438,276'Method and apparatus for improved performance of iterative decoders on channels with memory'20169,318,223'Programming nonvolatile memory based on statistical analysis of charge level distributions of memory cells'20169,245,632'Write pre-compensation for nonvolatile memory'20169,224,419'Data detector for detecting data in presence of control signals'20159,208,882'System and method for reading memory cells by accounting for inter-cell interference'20159,196,374'System and method for detecting data stored in multi-bit memory cells'20159,153,270'Defect emulation system'20159,147,491'Adaptive read and write systems and methods for memory cells'20159,143,168'Method and system for removing interference caused by servo data from user data'20159,129,654'Systems and methods for data-path protection'20159,112,480'Multi-mode audio amplifiers'20159,088,273'Adaptively interpolating and searching to refine sampling in pulse width modulation'20159,081,505'Method and system for improving disk drive performance'20159,075,745'System and method for adding a drive to a storage system having multiple drives'20159,070,454'Flash memory'20159,071,280'Method and apparatus for controlling a number of decoding iterations of a decoder based on a temperature of an integrated circuit that includes the decoder'20159,053,051'Multi-level memory controller with probability-distribution-based encoding'20159,048,879'Error correction system using an iterative product code'20159,026,894'Channel decoder and method for generating equalized data and data estimates based on multiple sets of depths provided via a viterbi algorithm'20159,009,560'Apparatus for encoding and decoding using sparse matrices'20158,976,909'Nonlinear detectors for channels with signal-dependent noise'20158,977,941'Iterative decoder systems and methods'20158,929,147'Determining threshold voltage distribution in flash memory'20158,910,013'Methods and apparatus for providing multi-layered coding for memory devices'20148,873,176'Non-linear transition shift identification and compensation'20148,874,997'System and method for combining pilot data with user data using a control module external to a memory'20148,873,614'Method and apparatus for using dual-viterbi algorithms to estimate data stored in a storage medium'20148,874,874'Method and storage drive for writing portions of blocks of data in respective arrays of memory cells of corresponding integrated circuits'20148,869,010'Controlling decoder iterations based on measurements of physical variables'20148,867,268'Accessing memory using reference voltages'20148,856,622'Apparatus and method for encoding data for storage in multi-level nonvolatile memory'20148,842,470'System and method for correcting signals read from a memory cell of a flash memory'20148,824,074'Hybrid defect detection for recording channels'20148,817,414'Data detector for detecting data in presence of control signals'20148,819,500'Defect detector for holographic storage systems'20148,819,530'Iterative decoder memory arrangement'20148,817,535'Programming method for multi-level cell flash for minimizing inter-cell interference'20148,788,911'Parity insertion for inner architecture'20148,788,916'Architecture and control of reed-solomon error-correction decoding'20148,762,809'LDPC codes and expansion method'20148,762,824'Error pattern generation for trellis-based detection and/or decoding'20148,760,793'Writing in hard disk drives'20148,751,906'Systems and methods for operating on a storage device using a life-cycle dependent coding scheme'20148,745,453'Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions'20148,743,616'Write pre-compensation for nonvolatile memory'20148,745,348'Method and system for improving disk drive performance'20148,732,432'Pilot placement for non-volatile memory'20148,725,929'Adaptive read and write systems and methods for memory cells'20148,711,510'Harmonic sensor'20148,705,285'Sequence detection for flash memory with inter-cell interference'20148,700,973'Post-processing decoder of LDPC codes for improved error floors'20148,693,122'Method and system for compensating for adjacent tracks during reading of data'20148,683,274'Error correction coding for varying signal-to-noise ratio channels'20148,677,215'Method and system for error correction in flash memory'20148,661,325'Iterative decoder systems and methods'20148,645,793'Statistical tracking for flash memory'20148,644,068'Method and system for programming multi-state memory'20148,638,613'Flash memory'20148,635,507'System and method for using pilot signals in non-volatile memory devices'20148,635,513'Architecture and control of Reed-Solomon list decoding'20148,635,508'Systems and methods for performing concatenated error correction'20148,634,286'Defect detection design'20148,627,167'Methods and apparatus for providing multi-layered coding for memory devices'20148,625,369'Determining threshold voltage distribution in flash memory'20148,627,179'Split sector recovery method'20148,594,246'Multi-Viterbi receive channel decoder'20138,595,587'Systems and methods for optimizing a product code structure'20138,593,747'Hybrid defect detection for recording channels'20138,589,774'Averaging signals to improve signal interpretation'20138,583,981'Concatenated codes for holographic storage'20138,583,857'Method and system for object-oriented data storage'20138,583,991'High density multi-level memory'20138,578,251'Power saving area-efficient hybrid BCH coding system'20138,578,248'Adaptive systems and methods for storing and retrieving data to and from memory cells'20138,566,664'System and method for correcting errors in non-volatile memory using products codes'20138,565,353'Unfolded decision-directed loop, architectures, apparatuses and systems including the same, and methods, algorithms and software for reducing latency in decision-directed loops'20138,555,117'Defect detector for holographic storage systems'20138,543,886'Parity insertion for inner architecture'20138,539,195'Non-volatile memory device with non-evenly distributable data access'20138,527,850'Architecture and control of reed-solomon error identification and evaluation'20138,522,123'Iterative decoder memory arrangement'20138,521,976'Method and system for improving disk drive performance'20138,516,332'Methods and algorithms for joint channel-code decoding of linear block codes'20138,495,442'Circuits, architectures, apparatuses, systems, algorithms, software and firmware for using reserved cells to indicate defect positions'20138,489,960'LDPC codes and expansion method'20138,489,977'Low-density parity check codes for holographic storage'20138,484,531'Post-processing decoder of LDPC codes for improved error floors'20138,484,537'Systems and methods for data-path protection'20138,484,527'Systems and methods for achieving higher coding rate using parity interleaving'20138,473,806'Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter'20138,473,812'Method and system for error correction in flash memory'20138,464,119'Defect recovery for iteratively-decoded data channel'20138,462,897'Nonlinear detectors for channels with signal-dependent noise'20138,458,557'Interleaved error correction coding for channels with non-uniform signal-to-noise ratios'20138,458,573'High-speed interface for read channel'20138,441,751'Dibit pulse extraction methods and systems'20138,441,750'Method and system for compensating for adjacent tracks during reading of data'20138,441,752'Dibit pulse extraction methods and systems'20138,429,483'Edge-based decoders for low-density parity-check codes'20138,429,488'System and method for using pilot signals in non-volatile memory devices'20138,429,507'Device and method for detecting and correcting errors in a data stream'20138,422,160'Harmonic sensor'20138,413,032'Read channel detector for noise cancellation'20138,407,559'Monitoring memory'20138,405,928'Analog techniques to decode signals extracted from computer-readable storage media'20138,406,048'Accessing memory using fractional reference voltages'20138,395,858'Methods and apparatus for performing interpolated timing recovery'20138,392,790'Systems and methods for optimizing a product code structure'20138,386,889'Drive replacement techniques for RAID systems'20138,381,082'Power-saving area-efficient hybrid BCH coding system'20138,359,527'Averaging signals to improve signal interpretation'20138,358,480'Non-linear transition shift identification and compensation'20138,358,541'Write pre-compensation for nonvolatile memory'20138,347,187'Adaptive systems and methods for storing and retrieving data to and from memory cells'20138,339,722'Methods of demodulating a servo positon error signal on patterned media'20128,339,720'Hybrid defect detection for recording channels'20128,339,874'Sequence detection for flash memory with inter-cell interference'20128,332,714'Defect recovery for iteratively-decoded data channel'20128,331,169'Determining threshold voltage distribution in flash memory'20128,321,763'Split sector recovery method'20128,316,287'Low-density parity check codes for holographic storage'20128,315,132'Defect detection design'20128,316,206'Pilot placement for non-volatile memory'20128,312,341'Interleaved error correction coding for channels with non-uniform SNRs'20128,312,354'Method and apparatus for improved performance of iterative decoders on channels with memory'20128,307,268'Iterative decoder systems and methods'20128,306,245'Multi-mode audio amplifiers'20128,300,339'Method and system for compensating for adjacent tracks during reading of data'20128,301,976'Defect detector for holographic storage systems'20128,296,635'Architecture and control of Reed-Solomon error-correction decoding'20128,291,283'Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter'20128,291,290'Methods and algorithms for joint channel-code decoding of linear block codes'20128,281,213'LDPC codes and expansion method'20128,279,546'Systems and methods for sync mark detection using correlation'20128,271,863'Forward decision aided nonlinear Viterbi detector'20128,266,495'Systems and methods for performing concatenated error correction'20128,266,484'Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions'20128,259,872'Nonlinear post-processors for channels with signal-dependent noise'20128,255,763'Error correction system using an iterative product code'20128,255,764'Embedded parity coding for data storage'20128,255,765'Embedded parity coding for data storage'20128,245,118'Architecture and control of reed-solomon error identification and evaluation'20128,228,728'Programming method for multi-level cell flash for minimizing inter-cell interference'20128,230,312'Iterative decoder memory arrangement'20128,225,148'Systems and methods for achieving higher coding rate using parity interleaving'20128,225,185'RS codec architecture that combines a compact encoder and serial BMA'20128,219,878'Post-processing decoder of LDPC codes for improved error floors'20128,219,894'Architecture and control of reed-solomon error-correction decoding'20128,219,886'High density multi-level memory'20128,219,775'Nonvolatile memory system'20128,213,236'Flash memory'20128,209,580'Error correction coding for varying signal-to-noise ratio channels'20128,209,582'Systems and methods for optimizing a product code structure'20128,190,963'Error correction using error detection codes'20128,190,961'System and method for using pilot signals in non-volatile memory devices'20128,189,381'System and method for reading flash memory cells'20128,190,976'High-speed interface for holographic storage read channel'20128,171,380'Adaptive systems and methods for storing and retrieving data to and from memory cells'20128,166,379'Calculating soft information from a multi-level modulation signal'20128,164,846'Hybrid defect detection for recording channels'20128,165,247'Unfolded decision-directed loop, architectures, apparatuses and systems including the same, and methods, algorithms and software for reducing latency in decision-directed loops'20128,166,370'Efficient RAID ECC controller for RAID systems'20128,161,361'Averaging signals to improve signal interpretation'20128,160,181'Nonlinear detectors for channels with signal-dependent noise'20128,154,820'Harmonic sensor'20128,154,822'Analog techniques to decode signals extracted from computer-readable storage media'20128,156,400'Embedded parity coding for data storage'20128,149,959'Enhancements of soft decoders and detectors on asymmetric channels'20128,144,510'Method and system for programming multi-state memory'20128,140,943'Parity insertion for inner architecture'20128,136,005'Multi-mode iterative detector'20128,136,016'Split sector recovery method'20128,132,083'Architecture and control of reed-solomon list decoding'20128,132,082'Architecture and control of Reed-Solomon error-correction decoding'20128,122,314'Defect recovery for iteratively-decoded data channel'20128,122,331'Media defect compensation system and method'20128,117,510'Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions'20128,090,059'Multi-viterbi receive channel decoder'20128,085,605'Sequence detection for flash memory with inter-cell interference'20118,086,945'Tensor product codes containing an iterative code'20118,077,520'Determining threshold voltage distribution in flash memory'20118,074,151'Correcting errors in disk drive read back signals by iterating with the reed-solomon decoder'20118,069,391'Error correction using error detection codes'20118,059,763'Approximate soft-information computation in multi-level modulation signaling schemes'20118,054,717'Defect detection design'20118,055,979'Flash memory with coding and signal processing'20118,049,983'Methods and apparatus for performing interpolated timing recovery'20118,046,660'System and method for correcting errors in non-volatile memory using product codes'20118,040,953'Reliability metric generation for trellis-based detection and/or decoding'20118,032,812'Error correction decoding methods and apparatus'20118,031,526'Write pre-compensation for nonvolatile memory'20118,027,378'Circuits, architectures, apparatuses, systems, algorithms and methods and software for amplitude drop detection'20118,028,216'Embedded parity coding for data storage'20118,019,959'Nonvolatile memory system'20118,015,224'Entropy source for random number generation'20118,010,852'Defect detection and handling for memory based on pilot cells'20118,010,883'Read channel detector for noise cancellation'20117,986,487'Harmonic sensor'20117,984,367'Method for iterative decoding in the presence of burst errors'20117,979,774'Error correction coding for varying quality channels'20117,978,100'Encoding and decoding methods using generalized concatenated codes (GCC)'20117,974,366'Low-latency baseline-wander compensation systems and methods'20117,974,034'Systems and methods for sync mark detection using correlation'20117,974,032'Non-linear transition shift identification and compensation'20117,961,797'Nonlinear viterbi complexity reduction'20117,962,827'Systems and methods for achieving higher coding rate using parity interleaving'20117,933,092'Method and apparatus for estimating a position of a head in a disk drive'20117,934,143'Parity insertion for inner architecture'20117,881,164'Sync mark detection with polarity uncertainty'20117,876,860'Enhancements of soft decoders and detectors on asymmetric channels'20117,861,131'Tensor product codes containing an iterative code'20107,848,396'Methods, algorithms, software, circuits, receivers, and systems for increasing bandwidth and/or recording density in data communication and data storage systems'20107,844,879'Method and system for error correction in flash memory'20107,840,878'Systems and methods for data-path protection'20107,836,364'Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions'20107,827,450'Defect detection and handling for memory based on pilot cells'20107,827,474'Marking unreliable symbols in a hard disk drive read back signal'20107,827,461'Low-density parity-check decoder apparatus'20107,821,731'Timing recovery for data storage channels with buffered sectors'20107,805,664'Likelihood metric generation for trellis-based detection and/or decoding'20107,801,254'Address generator for LDPC encoder and decoder and method thereof'20107,801,253'Nonlinear post-processors for channels with signal-dependent noise'20107,782,232'Encoding and decoding methods using generalized concatenated codes (GCC)'20107,774,675'LDPC codes and expansion method'20107,773,329'Correcting errors in a disk drive read back signals by iterating with the Reed-Solomon decoder'20107,774,688'Hardware efficient decoding system for Bose, Ray-Chaudhuri, Hocquenghem (BCH) product codes'20107,773,325'Timing recovery for data storage channels with buffered sectors'20107,765,458'Error pattern generation for trellis-based detection and/or decoding'20107,760,454'Sequence-permutation control information detection and signal polarity determination'20107,760,822'Address generator for LDPC encoder and decoder and method thereof'20107,755,522'Apparatus, method, and circuit for baseline loop analog cancellation'20107,751,138'Correcting errors in disk drive read back signals by iterating with the Reed-Solomon decoder'20107,751,505'LDPC encoder and encoder and method thereof'20107,715,135'Methods, circuits, apparatus, and systems for read channel synchronization and/or fly height measurement'20107,685,494'Error correction coding for varying signal-to-noise ratio channels'20107,675,436'Rate-7/8 direct-current free and runlength limited code'20107,661,058'Efficient raid ECC controller for raid systems'20107,657,823'Efficient RAID ECC controller for RAID systems'20107,629,903'Method and apparatus for generating non-binary balanced codes'20097,612,697'Rate-28/30 DC-free RLL code'20097,590,924'Architecture and control of Reed-Solomon list decoding'20097,590,923'Architecture and control of Reed-Solomon error identification and evaluation'20097,586,706'Method for checking the quality of servo gray codes'20097,583,751'LDPC encoder method thereof'20097,580,485'Address generator for LDPC encoder and decoder and method thereof'20097,571,372'Methods and algorithms for joint channel-code decoding of linear block codes'20097,538,967'Method and apparatus for estimating a position of a head in a disk drive'20097,518,820'Detecting fly height of a head over a storage medium'20097,499,233'Multi-phase control information detection and signal polarity determination'20097,493,550'Device and method for detecting and correcting errors in a data stream'20097,490,285'Marking unreliable symbols in a hard disk drive read back signal'20097,486,215'Apparatus, method, and circuit for baseline loop analog cancellation'20097,453,960'LDPC encoder and encoder and method thereof'20087,454,690'Architecture and control of reed-solomon list decoding'20087,450,040'Method and apparatus for generating non-binary balanced codes'20087,444,582'Architecture and control of reed-solomon error-correction decoding'20087,436,331'Rate-28/30 DC-free RLL code'20087,425,907'Rate-7/8 direct-current free and runlength limited code'20087,403,351'Sequence-permutation control information detection and signal polarity determination'20087,380,195'Error correction using error detection codes'20087,372,652'Correcting errors in disk drive read back signals by iterating with the Reed-Solomon decoder'20087,359,139'Detecting fly height of a head over a storage medium'20087,340,003'Multi-mode iterative detector'20087,319,726'Soft-output decoding method and apparatus for controlled intersymbol interference channels'20087,315,427'Method for checking the quality of servo Gray codes'20087,274,524'Correcting errors in disk drive read back signals by iterating with the reed-solomon decoder'20077,237,178'Marking unreliable symbols in a hard disk drive read back signal'20077,228,485'Error correction using error detection codes'20077,203,017'Timing recovery for data storage channels with buffered sectors'20077,203,013'Method and apparatus for asymmetry correction in magnetic recording channels'20077,199,961'Detecting fly height of a head over a storage medium'20077,184,486'LDPC encoder and decoder and method thereof'20077,168,033'Parity check matrix and method of forming thereof'20077,136,250'Detecting fly height of a head over a storage medium'20067,113,356'Method for checking the quality of servo gray codes'20067,099,411'Soft-output decoding method and apparatus for controlled intersymbol interference channels'20067,079,342'Method and apparatus for asymmetry correction in magnetic recording channels'20067,072,417'LDPC encoder and method thereof'20067,054,398'Method for selecting sync marks and sync mark detectors'20067,026,965'Separation enhanced Gray codes'20067,027,537'Iterative multi-user detection'20067,000,177'Parity check matrix and method of forming thereof'20066,965,652'Address generator for LDPC encoder and decoder and method thereof'20056,961,197'Correcting errors in disk drive read back signals by iterating with the Reed-Solomon decoder'20056,940,430'Separation enhanced gray codes'20056,931,585'Detection in the presence of media noise'20056,888,897'Multi-mode iterative detector'20056,876,316'Separation enhanced gray codes'20056,473,010'Method and apparatus for determining error correction code failure rate for iterative decoding algorithms'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2020Patents assigned to MARVELL INT LTD (243)· patent assignee history
2002–2020Based in Los Altos, CA, US· patent location history
2009–2017Patents assigned to MARVELL WORLD TRADE LTD (50)· patent assignee history
2011–2015Patents assigned to WU ZINING (130)· patent assignee history
2011–2015Patents assigned to BURD GREGORY (53)· patent assignee history
2011–2015Patents assigned to YANG XUESHI (35)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MARVELL INT LTD | 243 | 2002–2020 |
| WU ZININGself | 130 | 2011–2015 |
| BURD GREGORY | 53 | 2011–2015 |
| MARVELL WORLD TRADE LTD | 50 | 2009–2017 |
| YANG XUESHI | 35 | 2011–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Los Altos, California, US | 299 | 2002–2020 |