Inventor
Chien-Tai Chan
Inventor
Hsinchu, TW
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices37%
H01LSemiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1027%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
H05KPrinted circuits2%
H01JElectric discharge tubes or discharge lamps1%
PatentTitleYear
10,749,008Gate structure, semiconductor device and the method of forming semiconductor device202010,741,642Formation of dislocations in source and drain regions of finFET devices202010,665,717Semiconductor device and FinFET device202010,515,856Method of making a FinFET, and FinFET formed by the method201910,504,898Fin field-effect transistor structure and method for forming the same201910,276,715Fin field effect transistor and method for fabricating the same201910,224,245Method of making a finFET, and finFET formed by the method201910,153,344Formation of dislocations in source and drain regions of FinFET devices201810,141,417Gate structure, semiconductor device and the method of forming semiconductor device201810,062,780FinFET device20189,865,732'Integrated circuits and methods of forming integrated circuits'20189,768,256'Formation of dislocations in source and drain regions of FinFET devices'20179,722,081'FinFET device and method of forming the same'20179,659,776'Doping for FinFET'20179,537,010'Semiconductor device structure and method for forming the same'20179,508,556'Method for fabricating fin field effect transistor and semiconductor device'20169,379,208'Integrated circuits and methods of forming integrated circuits'20169,373,704'Multiple-gate semiconductor device and method'20169,362,404'Doping for FinFET'20169,343,575'FinFET and method of manufacturing the same'20169,312,179'Method of making a finFET, and finFET formed by the method'20169,293,534'Formation of dislocations in source and drain regions of FinFET devices'20169,224,737'Dual epitaxial process for a finFET device'20159,129,988'FinFET and method of manufacturing the same'20158,951,875'Semiconductor structure'20158,937,353'Dual epitaxial process for a finFET device'20158,895,383'Multiple-gate semiconductor device and method'20148,884,341'Integrated circuits'20148,785,286'Techniques for FinFET doping'20148,759,943'Transistor having notched fin structure and method of making the same'20148,703,593'Techniques for FinFET doping'20148,426,923'Multiple-gate semiconductor device and method'20138,357,579'Methods of forming integrated circuits'20138,187,928'Methods of forming integrated circuits'20127,994,016'Method for obtaining quality ultra-shallow doped regions and device having same'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (15)· patent assignee history
2011–2020Based in Hsinchu, TW· patent location history
2012–2016Patents assigned to CHAN CHIEN-TAI (8)· patent assignee history
2013–2014Patents assigned to LIN DA-WEN (4)· patent assignee history
2014–2016Patents assigned to LIN CHIA-PIN (3)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (20)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 20 | 2015–2020 |
| TAIWAN SEMICONDUCTOR MFG | 15 | 2011–2016 |
| CHAN CHIEN-TAIself | 8 | 2012–2016 |
| LIN DA-WEN | 4 | 2013–2014 |
| LIN CHIA-PIN | 3 | 2014–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 35 | 2011–2020 |