Inventor

Richard Burton

Inventor

Phoenix, AZ, US

Overview

1997–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 31 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices37%

H01LSemiconductor devices26%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%

H03KPulse technique4%

C23CCoating metallic material3%

H03FAmplifiers3%

H04BTransmission3%

H01FMagnets1%

H10HInorganic light-emitting semiconductor devices having potential barriers1%

PatentTitleYear

11,018,216High voltage capacitor and method2021 10,879,357Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice2020 10,879,356Method for making a semiconductor device including enhanced contact structures having a superlattice2020 10,868,120Method for making a varactor with hyper-abrupt junction region including a superlattice2020 10,854,717Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance2020 10,847,618Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance2020 10,840,337Method for making a FINFET having reduced contact resistance2020 10,840,336Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods2020 10,840,335Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance2020 10,840,388Varactor with hyper-abrupt junction region including a superlattice2020 10,825,902Varactor with hyper-abrupt junction region including spaced-apart superlattices2020 10,825,901Semiconductor devices including hyper-abrupt junction region including a superlattice2020 10,818,755Method for making semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance2020 10,777,451Semiconductor device including enhanced contact structures having a superlattice2020 10,692,853Electrostatic discharge (ESD) robust transistors and related methods2020 10,637,468Galvanically-isolated signaling between modules with step-up transformer2020 10,593,761Method for making a semiconductor device having reduced contact resistance2020 10,580,867FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance2020 10,580,866Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance2020 10,411,086High voltage capacitor and method2019 10,008,457Resonance-coupled signaling between IC modules2018 9,954,523Receiver for resonance-coupled signaling2018 7,955,943'High voltage sensor device and method therefor'2011 6,858,522'Electrical contact for compound semiconductor device and method for forming same'2005 6,768,140'Structure and method in an HBT for an emitter ballast resistor with improved characteristics'2004 6,673,687'Method for fabrication of a heterojunction bipolar transistor'2004 6,614,117'Method for metallization of a semiconductor substrate and related structure'2003 6,596,635'Method for metallization of a semiconductor substrate'2003 6,573,599'Electrical contact for compound semiconductor device and method for forming same'2003 6,531,721'Structure for a heterojunction bipolar transistor'2003 5,667,632'Method of defining a line width'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997Patents assigned to MOTOROLA INC (1)· patent assignee history

1997Based in Tempe, AZ, US· patent location history

2003–2005Patents assigned to SKYWORKS SOLUTIONS INC (7)· patent assignee history

2003–2005Based in Newbury Park, CA, US· patent location history

2003Based in Thousand Oaks, CA, US· patent location history

2011Patents assigned to SEMICONDUCTOR COMPONENTS IND (1)· patent assignee history

2011–2021Based in Phoenix, AZ, US· patent location history

2018–2021Patents assigned to SEMICONDUCTOR COMPONENTS IND LLC (6)· patent assignee history

2020Patents assigned to ATOMERA INC (16)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ATOMERA INC	16	2020
SKYWORKS SOLUTIONS INC	7	2003–2005
SEMICONDUCTOR COMPONENTS IND LLC	6	2018–2021
MOTOROLA INC	1	1997
SEMICONDUCTOR COMPONENTS IND	1	2011

Locations

Location	Patents	Span
Phoenix, AZ, US	23	2011–2021
Newbury Park, California, US	5	2003–2005
Thousand Oaks, California, US	2	2003
Tempe, AZ, US	1	1997