Inventor
Brian Worth
Inventor
Milton, VT, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique34%
G01NInvestigating or analysing materials by determining their chemical or physical properties13%
G01RMeasuring electric variables13%
G06FElectric digital data processing13%
G11CStatic stores6%
G01LMeasuring force, stress, torque, work, mechanical power, mechanical efficiency, or fluid pressure3%
G06TImage data processing or generation, in general3%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy3%
H03MCoding3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
PatentTitleYear
10,816,522Continuous gas detection and monitoring apparatus for harsh environments202010,782,274Portable long term gas detecting and monitoring apparatus202010,656,040Harsh environment differential pressure monitor202010,557,838Portable gas detecting and monitoring apparatus20209,104,832'Identifying and mitigating electromigration failures in signal nets of an integrated circuit chip design'20159,104,834'Systems and methods for single cell product path delay analysis'20158,904,329'Systems and methods for single cell product path delay analysis'20147,089,132'Method and system for providing quality control on wafers running on a manufacturing line'20066,379,828'Fuel cell'20026,198,400'Portable gas detection and/or monitoring apparatus for a hostile environment'2001D0432037'Gas detection unit'20006,021,513'Testable programmable gate array and associated LSSD/deterministic test methodology'20005,867,507'Testable programmable gate array and associated LSSD/deterministic test methodology'19995,781,032'Programmable inverter circuit used in a programmable logic cell'19985,748,009'Programmable logic cell'19985,745,734'Method and system for programming a gate array using a compressed configuration bit stream'19985,732,246'Programmable array interconnect latch'19985,717,346'Low skew multiplexer network and programmable array clock/reset application thereof'19985,703,498'Programmable array clock/reset resource'19975,692,147'Memory mapping method and apparatus to fold sparsely populated structures into densely populated memory columns or rows by selectively transposing X and Y address portions, and programmable gate array applications thereof'19975,671,432'Programmable array I/O-routing resource'19975,652,529'Programmable array clock/reset resource'19975,646,546'Programmable logic cell having configurable gates and multiplexers'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2015Patents assigned to IBM (16)· patent assignee history
1997–1998Patents assigned to ATMEL CORP (3)· patent assignee history
1997–2000Based in Milton, VT, US· patent location history
2000–2001Patents assigned to APP TEK PTY LTD (2)· patent assignee history
2000–2001Based in Murrumba Downs, AU· patent location history
2002Based in Cardana Di Besozzo, IT· patent location history
2006–2015Based in Jericho, VT, US· patent location history
2020Patents assigned to ACRULOG PTY LTD (4)· patent assignee history
2020Patents assigned to WORTH BRIAN (2)· patent assignee history
2020Based in Woody Point, AU· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 16 | 1997–2015 |
| ACRULOG PTY LTD | 4 | 2020 |
| ATMEL CORP | 3 | 1997–1998 |
| APP TEK PTY LTD | 2 | 2000–2001 |
| WORTH BRIANself | 2 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Milton, VT, US | 12 | 1997–2000 |
| Woody Point, AU | 4 | 2020 |
| Jericho, VT, US | 4 | 2006–2015 |
| Murrumba Downs, AU | 2 | 2000–2001 |
| Cardana Di Besozzo, IT | 1 | 2002 |