Inventor
Yi-Tzu Chen
Inventor
Hsinchu, TW
Overview
Patents· 49 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores27%
H01LSemiconductor devices14%
A63BApparatus for physical training, gymnastics, swimming, climbing, or fencing8%
H10DInorganic electric semiconductor devices8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G06FElectric digital data processing7%
H10BElectronic memory devices6%
H03KPulse technique5%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner2%
H03MCoding2%
PatentTitleYear
11,122,033Multi factor authentication2021D0930599Furniture controller202111,114,549Semiconductor structure cutting process and structures formed thereby202111,013,720Ganetespib-containing particle, pharmaceutical composition comprising the same, and their use in anticancer treatment202111,011,619Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices202111,004,844Recessed STI as the gate dielectric of HV device202110,991,693Boundary region for high-k-metal-gate (HKMG) integration technology202110,950,708Dishing prevention dummy structures for semiconductor devices202110,937,785Semiconductor device202110,916,542Recessed STI as the gate dielectric of HV device202110,658,026Word line pulse width control circuit in static random access memory202010,632,339Treadmill202010,632,335Magnetically-controlled damping device202010,299,584Adjustable desk201910,121,520Memory array and method of forming the same20189,959,911Memory array and method of forming the same20189,928,888'Low power consumption memory device'20189,865,335'SRAM device capable of working in multiple low voltages without loss of performance'20189,711,209'Three-dimensional wordline sharing memory'20179,654,146'Bi-directional parity bit generator circuit'20179,643,047'Sit-up bench apparatus'20179,583,494'Apparatus and method for integrated circuit bit line sharing'20179,583,181'SRAM device capable of working in multiple low voltages without loss of performance'20179,295,874'Elliptical trainer'20169,299,420'Data-aware SRAM systems and methods forming same'20169,299,391'Three-dimensional wordline sharing memory'20169,275,721'Split bit line architecture circuits and methods for memory devices'20169,208,857'SRAM multiplexing apparatus'20159,148,132'VDD-independent oscillator insensitive to process variation'20159,058,899'Data-aware SRAM systems and methods forming same'20159,007,851'Memory read techniques using Miller capacitance decoupling circuit'20158,958,237'Static random access memory timing tracking circuit'20158,947,953'Bit cell internal voltage control'20158,840,529'Adjustable elliptical trainer'20148,750,053'SRAM multiplexing apparatus'20148,587,992'Data-aware SRAM systems and methods forming same'20138,576,642'Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices'20138,556,780'Multi-functional linked fitness equipment'20138,531,248'VDD-independent oscillator insensitive to process variation'20138,451,671'Multiplexing circuit for high-speed, low leakage, column-multiplexing memory devices'20138,416,002'Flip-flop circuit design'20138,405,441'Latch circuitry and methods of operating latch circuitry'20138,359,528'Parity look-ahead scheme for tag cache memory'20138,233,330'Sense amplifier used in the write operations of SRAM'20128,210,998'Abdominal exercise device'20128,208,331'Method for asymmetric sense amplifier'20128,116,149'Circuit and method for small swing memory signals'20128,051,337'System and method for fast cache-hit detection'20118,027,214'Asymmetric sense amplifier'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (20)· patent assignee history
2011–2021Based in Hsinchu, TW· patent location history
2012–2017Patents assigned to CHEN YI-TZU (16)· patent assignee history
2012–2013Patents assigned to CHOU CHUNG-CHENG (4)· patent assignee history
2012–2016Based in Bade City, TW· patent location history
2013–2016Patents assigned to SHIEH HAU-TAI (4)· patent assignee history
2015–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (18)· patent assignee history
2017–2020Based in Taoyuan, TW· patent location history
2021Based in Hsin Chu, TW· patent location history
2021Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 20 | 2011–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 18 | 2015–2021 |
| CHEN YI-TZUself | 16 | 2012–2017 |
| CHOU CHUNG-CHENG | 4 | 2012–2013 |
| SHIEH HAU-TAI | 4 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 35 | 2011–2021 |
| Taoyuan, TW | 4 | 2017–2020 |
| Bade City, TW | 4 | 2012–2016 |
| Hsin Chu, TW | 3 | 2021 |
| New Taipei, TW | 1 | 2021 |