Inventor
Henry A. Nye, III
Inventor
Brookfield, CT, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1047%
H10DInorganic electric semiconductor devices8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
Y10TTechnical subjects covered by former us classification8%
C23CCoating metallic material5%
H05KPrinted circuits5%
B23KSoldering or unsoldering3%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form3%
C11DDetergent compositions3%
PatentTitleYear
8,026,613'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20117,923,849'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20117,517,736'Structure and method of chemically formed anchored metallic vias'20097,410,833'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20087,276,296'Immersion plating and plated structures'20077,273,803'Ball limiting metallurgy, interconnection structure including the same, and method of forming an interconnection structure'20077,037,559'Immersion plating and plated structures'20066,946,379'Insulative cap for laser fusing'20056,908,841'Support structures for wirebond regions of contact pads over low modulus materials'20056,900,142'Inhibition of tin oxide formation in lead free interconnect formation'20056,821,890'Method for improving adhesion to copper'20046,784,516'Insulative cap for laser fusing'20046,531,759'Alpha particle shield for integrated circuit'20036,486,557'Hybrid dielectric structure for improving the stiffness of back end of the line structures'20026,478,212'Bond pad structure and method for reduced downward force wirebonding'20026,271,595'Method for improving adhesion to copper'20016,261,945'Crackstop and oxygen barrier for low-K dielectric integrated circuits'20016,133,136'Robust interconnect structure'20005,904,156'Dry film resist removal in the presence of electroplated C4\'s'19995,629,564'Electroplated solder terminal'19975,503,286'Electroplated solder terminal'19965,268,072'Etching processes for avoiding edge stress in semiconductor chip solder bumps'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2011Patents assigned to IBM (22)· patent assignee history
1993Based in Danbury, CT, US· patent location history
1996–1997Based in Bedford, NY, US· patent location history
1999–2011Based in Brookfield, CT, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 22 | 1993–2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Brookfield, CT, US | 19 | 1999–2011 |
| Bedford, New York, US | 2 | 1996–1997 |
| Danbury, CT, US | 1 | 1993 |