Inventor

Carla Golla

Inventor
Sesto San Giovanni, IT

Overview

26→
Patents
1995–2003
Patent span
Physics
Primary field (CPC G)

Patents· 26 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores47%
G06FElectric digital data processing13%
H03HImpedance networks, e.g. resonant circuits9%
H03KPulse technique9%
G05FSystems for regulating electric or magnetic variables6%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems6%
H10DInorganic electric semiconductor devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
6,590,247'MOS capacitor with wide voltage and frequency operating ranges'20036,437,636'Low consumption voltage boost device'20026,153,914'Output circuit for integrated circuits'20006,150,844'High voltage tolerance output stage'20006,144,589'Boosting circuit, particularly for a memory device'20006,097,213'Switching circuit with an output voltage changing among four possible values'20006,064,598'Switching circuit'20005,859,797'Biasing circuit for UPROM cells with low voltage supply'19995,815,464'Address transition detection circuit'19985,812,017'Charge pump voltage multiplier circuit'19985,778,012'Memory device with improved yield and reliability'19985,768,115'Voltage booster with an acceleration circuit'19985,748,548'Device for detecting a reduction in a supply voltage'19985,724,395'Method and apparatus for filtering digital signals'19985,717,642'Load signal generating method and circuit for nonvolatile memories'19985,687,124'Circuit for identifying a memory cell having erroneous data stored therein'19975,659,509'Method for programming redundancy registers in a row redundancy integrated circuitry for a semiconductor memory device, and row redundancy integrated circuitry'19975,594,677'Method and apparatus for filtering high resolution digital signals'19975,566,114'Redundancy circuitry for a semiconductor memory device'19965,563,816'High-resolution digital filter'19965,563,826'Memory array cell reading circuit with extra current branch'19965,546,054'Current source having voltage stabilizing element'19965,544,085'Fast adder chain'19965,499,217'Bias circuit for a memory line decoder driver of nonvolatile memories'19965,471,413'Fast adder chain'19955,400,272'Diagonal propagation digital multiplier'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2003Patents assigned to SGS THOMSON MICROELECTRONICS (12)· patent assignee history
1995–1996Based in Sesto Florentino, IT· patent location history
1995Based in Sesto, IT· patent location history
1996–2002Patents assigned to ST MICROELECTRONICS SRL (12)· patent assignee history
1996–2003Based in Sesto San Giovanni, IT· patent location history
1997–1998Based in Milan, IT· patent location history
2000Patents assigned to STMICROELECRONICS S R L (1)· patent assignee history
2000Patents assigned to STMICROELECTRONIC S R L (1)· patent assignee history
2000Based in San Giovanni, IT· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SGS THOMSON MICROELECTRONICS121995–2003
ST MICROELECTRONICS SRL121996–2002
STMICROELECRONICS S R L12000
STMICROELECTRONIC S R L12000
Locations
LocationPatentsSpan
Sesto San Giovanni, IT201996–2003
Milan, IT21997–1998
Sesto Florentino, IT21995–1996
San Giovanni, IT12000
Sesto, IT11995