Inventor
Victor Y. Lu
Inventor
Foster City, CA, US
Overview
Patents· 47 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H01LSemiconductor devices13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H10DInorganic electric semiconductor devices8%
C09DCoating compositions, e.g. paints, varnishes or lacquers5%
G06FElectric digital data processing4%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes4%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
C08JWorking-up3%
C25DProcesses for the electrolytic or electrophoretic production of coatings3%
PatentTitleYear
11,111,910Ultra high vacuum cryogenic pumping apparatus with nanostructure material202110,811,263Method for forming semiconductor device structure with etch stop layer202010,755,953Cluster tool techniques with improved efficiency202010,714,433Semiconductor structure and method for manufacturing the same202010,526,719Magnetic structure for metal plating control202010,522,360Method for forming semiconductor device structure with etch stop layer201910,510,566Cluster tool techniques with improved efficiency201910,504,283Method and apparatus for regularizing building footprints using taxicab distance201910,438,362Method and apparatus for homography estimation201910,307,798Cleaning device for cleaning electroplating substrate holder201910,276,397CVD metal seed layer201910,269,573Device and method for manufacturing a semiconductor structure201910,223,829Method and apparatus for generating a cleaned object model for an object in a mapping database201910,170,312Semiconductor substrate and manufacturing method of the same201910,157,819Semiconductor device and manufacturing method thereof201810,145,371Ultra high vacuum cryogenic pumping apparatus with nanostructure material201810,020,198Semiconductor structure having low-k spacer and method of manufacturing the same201810,002,780Method of manufacturing a semiconductor structure20189,951,437Insulator plate for metal plating control20189,899,297'Semiconductor device having a through-silicon via and manufacturing method thereof'20189,858,503'Acceleration of linear classifiers'20189,824,940'Intelligent metrology based on module knowledge'20179,476,705'Determining travel path features based on retroreflectivity'20169,472,502'Cobalt interconnect techniques'20169,257,302'CVD flowable gap fill'20169,158,992'Acceleration of linear classifiers'20158,992,806'Antireflective coatings for via fill and photolithography applications and methods of preparation thereof'20158,889,233'Method for reducing stress in porous dielectric films'20148,747,964'Ion-induced atomic layer deposition of tantalum'20148,699,755'Determining travel path features based on retroreflectivity'20148,583,775'System and method for generating and reporting cookie values at a client node'20138,234,148'Method and apparatus for real-time reporting of electronic commerce activity'20128,234,362'System and method for generating and reporting cookie values at a client node'20128,187,951'CVD flowable gap fill'20128,053,159'Antireflective coatings for via fill and photolithography applications and methods of preparation thereof'20117,983,944'Method and apparatus for real-time reporting of electronic commerce activity'20117,915,181'Repair and restoration of damaged dielectric materials and films'20117,888,273'Density gradient-free gap fill'20117,629,227'CVD flowable gap fill'20097,562,030'Method and apparatus for real-time reporting of electronic commerce activity'20097,445,953'Low temperature curable materials for optical applications'20087,381,442'Porogens for porous silica dielectric for integral circuit applications'20087,381,441'Low metal porous silica dielectric for integral circuit applications'20087,254,701'Method and device for safeguarding a digital process device'20077,153,783'Materials with enhanced properties for shallow trench isolation/premetal dielectric applications'20067,148,263'Hybrid inorganic/organic low k dielectric films with improved mechanical strength'20067,015,061'Low temperature curable materials for optical applications'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2015Patents assigned to HONEYWELL INT INC (9)· patent assignee history
2006–2016Based in Santa Cruz, CA, US· patent location history
2007–2020Based in Hsinchu, TW· patent location history
2009–2016Patents assigned to NOVELLUS SYSTEMS INC (6)· patent assignee history
2009–2013Based in Portland, OR, US· patent location history
2012–2015Patents assigned to LU VICTOR (7)· patent assignee history
2014–2021Based in Foster City, CA, US· patent location history
2014–2018Based in Urbana, IL, US· patent location history
2015–2019Patents assigned to HERE GLOBAL BV (6)· patent assignee history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (19)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 19 | 2016–2021 |
| HONEYWELL INT INC | 9 | 2006–2015 |
| LU VICTORself | 7 | 2012–2015 |
| HERE GLOBAL BV | 6 | 2015–2019 |
| NOVELLUS SYSTEMS INC | 6 | 2009–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Foster City, California, US | 19 | 2014–2021 |
| Santa Cruz, California, US | 13 | 2006–2016 |
| Portland, OR, US | 5 | 2009–2013 |
| Urbana, Illinois, US | 4 | 2014–2018 |
| Hsinchu, TW | 3 | 2007–2020 |