Inventor

Timothy E. Hoglund

Inventor

Colorado Springs, CO, US

Overview

1993–2020

Patent span

Physics

Primary field (CPC G)

Patents· 47 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing82%

H04LTransmission of digital information, e.g. telegraphic communication16%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%

PatentTitleYear

10,649,906Method and system for hardware accelerated row lock for a write back volume2020 10,528,438Method and system for handling bad blocks in a hardware accelerated caching solution2020 10,423,357Devices and methods for managing memory buffers2019 10,394,673Method and system for hardware accelerated copyback2019 10,282,301Method and system for hardware accelerated read-ahead caching2019 10,282,116Method and system for hardware accelerated cache flush2019 10,223,009Method and system for efficient cache buffering supporting variable stripe sizes to enable hardware acceleration2019 10,108,359Method and system for efficient cache buffering in a system having parity arms to enable hardware acceleration2018 10,078,460Memory controller utilizing scatter gather list techniques2018 9,910,797'Space efficient formats for scatter gather lists'2018 9,910,798'Storage controller cache memory operations that forego region locking'2018 9,436,636'Structure for non-blocking serial attached SCSI infrastructure utilizing virtual pathways'2016 9,424,219'Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge'2016 9,400,614'Method and system for programmable sequencer for processing I/O for various PCIe disk drives'2016 9,323,658'Multi-mapped flash RAID'2016 9,286,136'Hash-based region locking'2016 9,043,642'Data manipulation on power fail'2015 8,943,226'Interface for heterogeneous PCI-e storage devices'2015 8,904,158'Storage system with boot appliance for improving reliability/availability/serviceability in high density server environments'2014 8,751,718'Apparatus and methods for a simplified, multi-client SAS port for management of other devices in an enhanced SAS device'2014 8,539,096'Systems and methods for configuring ports of an SAS domain'2013 8,332,849'Paravirtualization acceleration through single root I/O virtualization'2012 8,260,980'Simultaneous intermediate proxy direct memory access'2012 8,230,134'Fast path SCSI IO'2012 8,200,922'Storage system snapshot assisted by SSD technology'2012 8,180,935'Methods and apparatus for interconnecting SAS devices using either electrical or optical transceivers'2012 8,131,933'Methods and systems for communication between storage controllers'2012 7,849,248'Method and system for combining multiple serial attached small computer system interface (SAS) expanders'2010 7,689,744'Methods and structure for a SAS/SATA converter'2010 7,590,819'Compact memory management unit'2009 7,529,877'Apparatus and methods for simplified SSP link layer processing'2009 6,973,524'Interface for bus independent core'2005 6,925,519'Automatic translation from SCSI command protocol to ATA command protocol'2005 6,810,448'Method and apparatus for processing chain messages (SGL chaining)'2004 6,747,984'Method and apparatus for transmitting Data'2004 6,732,198'Methods and apparatus for saving and restoring scatter/gather list processing context in intelligent controllers'2004 6,721,826'Buffer partitioning for managing multiple data streams'2004 6,721,320'Method and apparatus for fibre channel identification and retrieval'2004 6,647,483'Address translation circuit for processors utilizing a single code image'2003 6,570,853'Method and apparatus for transmitting data to a node in a distributed data processing system'2003 6,321,342'Method and apparatus for interfacing circuits that operate based upon different clock signals'2001 6,185,620'Single chip protocol engine and data formatter apparatus for off chip host memory to local memory transfer and conversion'2001 6,029,216'Auto-termination method and apparatus for use with either active high or active low terminators'2000 6,009,275'Centralized management of resources shared by multiple processing units'1999 5,777,987'Method and apparatus for using multiple FIFOs to improve flow control and routing in a communications receiver'1998 5,761,424'Method and apparatus for programmable filtration and generation of information in packetized communication systems'1998 5,237,660'Control method and apparatus for controlling the data flow rate in a FIFO memory, for synchronous SCSI data transfers'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993Based in Wichita, KS, US· patent location history

1998–2020Based in Colorado Springs, CO, US· patent location history

2000–2009Patents assigned to LSI LOGIC CORP (13)· patent assignee history

2009–2016Patents assigned to LSI CORP (15)· patent assignee history

2012–2016Patents assigned to HOGLUND TIMOTHY E (11)· patent assignee history

2015–2018Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (10)· patent assignee history

2019–2020Patents assigned to AVAGO TECH INT SALES PTE LID (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
LSI CORP	15	2009–2016
LSI LOGIC CORP	13	2000–2009
HOGLUND TIMOTHY Eself	11	2012–2016
AVAGO TECHNOLOGIES GENERAL IP	10	2015–2018
AVAGO TECH INT SALES PTE LID	7	2019–2020

Locations

Location	Patents	Span
Colorado Springs, CO, US	46	1998–2020
Wichita, KS, US	1	1993