Inventor
JON-HSU HO
Inventor
TW
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H01LSemiconductor devices26%
B82YSpecific uses or applications of nanostructures13%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices6%
G06FElectric digital data processing6%
PatentTitleYear
12,568,640Multi-gate devices with multi-layer inner spacers and fabrication methods thereof202612,396,240Source/drain silicide for multigate device performance and method of fabricating thereof202512,361,199Integrated circuit layout generation method202512,317,526Multi-gate devices and fabricating the same with etch rate modulation202512,300,754Channel configurations with stacked segments for gate-all-around based devices and methods of fabrication thereof202512,218,214Source/drain silicide for multigate device performance and method of fabricating thereof202512,125,848Semiconductor device structure incorporating air gap202412,040,381Method of manufacturing semiconductor devices and semiconductor devices202411,949,001Multi-gate devices and fabricating the same with etch rate modulation202411,908,919Multi-gate devices with multi-layer inner spacers and fabrication methods thereof202411,907,636Integrated circuit layout generation method202411,626,400Semiconductor device structure incorporating air gap202311,621,343Method of manufacturing semiconductor devices and semiconductor devices202311,616,151Channel configuration for improving multigate device performance and method of fabrication thereof202311,508,807Semiconductor device having nanosheet transistor and methods of fabrication thereof202211,392,749Integrated circuit layout generation method and system202211,282,943Multi-gate devices and fabricating the same with etch rate modulation2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (17)· patent assignee history
2022–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 17 | 2022–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 17 | 2022–2026 |