Inventor

PO-YAO CHUANG

Inventor

TW

Overview

2021–2026

Patent span

Electricity

Primary field (CPC H)

Patents· 66 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary

H01LSemiconductor devices31%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1031%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1027%

H10DInorganic electric semiconductor devices4%

H01QAntennas, i.e. radio aerials4%

H01GCapacitors2%

H05KPrinted circuits0%

PatentTitleYear

12,564,076Chip package with fan-out feature and method for forming the same2026 12,532,771Package structure with fan-out feature2026 12,476,198Package structure with adhesive element over semiconductor chip2025 12,463,161Semiconductor device and method of manufacture2025 12,444,663Semiconductor package including a semiconductor die disposed in a cavity and method for manufacturing thereof2025 12,412,851Semiconductor device and method of manufacture2025 12,388,028Package structure2025 12,362,341Semiconductor devices and methods of manufacturing2025 12,354,989Package structure with conductive via structure2025 12,308,322Dual-sided routing in 3D semiconductor system-in-package structure and methods of forming the same2025 12,308,313Semiconductor package with improved interposer structure2025 12,300,592Fan-out package with controllable standoff2025 12,237,262Semiconductor package with improved interposer structure2025 12,224,266Semiconductor packages including passive devices and methods of forming same2025 12,205,861Manufacturing method of semiconductor package including forming cavity in circuit substrate without exposing floor plate2025 12,199,084Fan-out package with cavity substrate2025 12,198,996Integrated fan-out package, package-on-package structure, and manufacturing method thereof2025 12,191,261Semiconductor device including electromagnetic interference (EMI) shielding and method of manufacture2025 12,176,337Semiconductor devices and methods of manufacturing2024 12,170,274Semiconductor packages and methods of forming same2024 12,166,025Semiconductor devices and methods of manufacturing2024 12,131,984Heterogeneous fan-out structure and method of manufacture2024 12,113,025Semiconductor package with dual sides of metal routing2024 12,100,666Method for forming chip package structure2024 12,094,819Method for forming package structure2024 12,074,104Integrated circuit packages with ring-shaped substrates2024 12,057,424Package structure and method for forming the same2024 12,051,654Package structure and method of fabricating the same2024 12,046,548Chip package with redistribution structure having multiple chips2024 12,021,045Semiconductor device and method of manufacture2024 11,996,606Heterogeneous antenna in fan-out package2024 11,996,372Semiconductor device and method of manufacture2024 11,948,892Formation method of chip package with fan-out feature2024 11,908,764Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity2024 11,901,307Semiconductor device including electromagnetic interference (EMI) shielding and method of manufacture2024 11,901,277Semiconductor package and method of manufacturing the same2024 11,901,279Semiconductor package and method of manufacturing the same2024 11,855,059Fan-out package with cavity substrate2023 11,854,955Fan-out package with controllable standoff2023 11,848,265Semiconductor package with improved interposer structure2023 11,848,305Semiconductor packages including passive devices and methods of forming same2023 11,824,007Dual-sided routing in 3D SiP structure2023 11,804,451Package structure and method of fabricating the same2023 11,764,159Package with fan-out structures2023 11,682,599Chip package structure with molding layer and method for forming the same2023 11,670,577Chip package with redistribution structure having multiple chips2023 11,646,256Heterogeneous fan-out structure and method of manufacture2023 11,637,054Semiconductor package and method of manufacturing the same2023 11,610,854Semiconductor device and method of manufacture2023 11,600,575Method for forming chip package structure2023 11,600,573Structure and formation method of chip package with conductive support elements to reduce warpage2023 11,532,867Heterogeneous antenna in fan-out package2022 11,527,474Integrated circuit package and method2022 11,456,257Semiconductor package with dual sides of metal routing2022 11,430,776Semiconductor devices and methods of manufacturing2022 11,410,982Semiconductor devices and methods of manufacturing2022 11,380,666Fan-out package with cavity substrate2022 11,362,010Structure and formation method of chip package with fan-out feature2022 11,322,447Dual-sided routing in 3D SiP structure2022 11,322,449Package with fan-out structures2022 11,302,650Package structure and method of fabricating the same2022 11,296,065Semiconductor packages and methods of forming same2022 11,270,953Structure and formation method of chip package with shielding structure2022 11,270,975Semiconductor packages including passive devices and methods of forming same2022 11,239,173Structure and formation method of chip package with fan-out feature2022 11,164,754Fan-out packages and methods of forming the same2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (66)· patent assignee history

2021–2026Based in TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	66	2021–2026

Locations

Location	Patents	Span
TW	66	2021–2026