Inventor
Ankur Goel
Inventor
Noida, IN
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores77%
H01LSemiconductor devices8%
H10BElectronic memory devices8%
G06FElectric digital data processing4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
PatentTitleYear
10,861,534Memory cell write assist in response to voltage tracking of a replica circuit202010,854,280Read assist circuitry for memory applications202010,515,684Read assist circuitry for memory applications201910,229,731Method, system and circuit for staggered boost injection201910,199,094Write operation scheme for SRAM201910,199,092Boost circuit for memory20199,997,217Write assist circuitry20189,424,900'Area-efficient process-and-temperature-adaptive self-time scheme for performance and power improvement'20169,384,790'Memory device with separately controlled sense amplifiers'20169,251,889'Area-efficient, high-speed, dynamic-circuit-based sensing scheme for dual-rail SRAM memories'20169,177,620'Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality'20158,773,942'Segmented memory having power-saving mode'20148,730,750'Memory device with control circuitry for generating a reset signal in read and write modes of operation'20148,724,421'Dual rail power supply scheme for memories'20148,699,281'Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality'20148,462,562'Memory device with area efficient power gating circuitry'20138,427,886'Memory device with trimmable power gating capabilities'20138,259,509'Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality'20127,826,241'Semiconductor memory device that can relieve defective address'20107,619,916'8-T SRAM cell circuit, system and method for low leakage current'20097,545,180'Sense amplifier providing low capacitance with reduced resolution time'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2014Based in Haryana, IN· patent location history
2009Based in Karnal, IN· patent location history
2010–2014Patents assigned to ELPIDA MEMORY INC (3)· patent assignee history
2010–2016Based in Bangalore, IN· patent location history
2012–2016Patents assigned to GOEL ANKUR (6)· patent assignee history
2013–2016Patents assigned to LSI CORP (6)· patent assignee history
2015Based in Bangaiore, IN· patent location history
2016Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (3)· patent assignee history
2018–2020Patents assigned to ADVANCED RISC MACH LTD (7)· patent assignee history
2018–2020Based in Noida, IN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED RISC MACH LTD | 7 | 2018–2020 |
| GOEL ANKURself | 6 | 2012–2016 |
| LSI CORP | 6 | 2013–2016 |
| AVAGO TECHNOLOGIES GENERAL IP | 3 | 2016 |
| ELPIDA MEMORY INC | 3 | 2010–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Noida, IN | 7 | 2018–2020 |
| Bangalore, IN | 7 | 2010–2016 |
| Haryana, IN | 5 | 2009–2014 |
| Bangaiore, IN | 1 | 2015 |
| Karnal, IN | 1 | 2009 |