LexDanaLexDanabeta
Inventor

Deyuan Xiao

Inventor
Shanghai, CN

Overview

87→
Patents
2009–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 87 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices29%
H01LSemiconductor devices26%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
B82YSpecific uses or applications of nanostructures6%
H10BElectronic memory devices3%
H10HInorganic light-emitting semiconductor devices having potential barriers3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
G11CStatic stores2%
H01JElectric discharge tubes or discharge lamps2%
H10KOrganic electric solid-state devices2%
PatentTitleYear
10,720,332Transistor and fabrication method thereof202010,615,081Fin tunneling field effect transistor and manufacturing method thereof202010,553,496Complementary metal-oxide-semiconductor field-effect transistor and method thereof202010,468,505Cylindrical germanium nanowire device201910,373,880Semiconductor device and related manufacturing method201910,170,356SOI substrate and manufacturing method thereof201910,100,431Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof201810,103,268Vertical junctionless transistor devices201810,083,879Semiconductor nanowire device and fabrication method thereof201810,043,671Transistor and fabrication method thereof201810,026,850Transistor and fabrication method thereof201810,014,210SOI substrate and manufacturing method thereof20189,991,082Semiconductor device and related manufacturing method20189,972,637Metal-ono-vacuum tube charge trap flash (VTCTF) nonvolatile memory and the method for making the same20189,972,543Complementary nanowire semiconductor device and fabrication method thereof20189,911,742'Semiconductor structures'20189,905,677'Method to form a cylindrical germanium nanowire device on bulk silicon substrate'20189,875,943Complementary metal-oxide-semiconductor field-effect transistor and method thereof20189,834,861Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof20179,837,517Method for making III-V nanowire quantum well transistor20179,825,133'Semiconductor device and related manufacturing method'20179,818,844'High-voltage junctionless device with drift region and the method for making the same'20179,793,138'Thermal processing method for wafer'20179,793,285'Metal-ono-vacuum tube charge trap flash (VTCTF) nonvolatile memory and the method for making the same'20179,793,173'Semiconductor device and related manufacturing method'20179,779,964'Thermal processing method for wafer'20179,779,999'Complementary nanowire semiconductor device and fabrication method thereof'20179,773,891'FinFET and fabrication method thereof'20179,773,670'Method of preparation of III-V compound layer on large area Si insulating substrate'20179,748,405'Transistor and fabrication method thereof'20179,735,362'Tunneling nanotube field effect transistor and manufacturing method thereof'20179,728,504'Interconnect structures and fabrication method thereof'20179,721,846'Hybrid integration fabrication of nanowire gate-all-around GE PFET and polygonal III-V PFET CMOS device'20179,716,178'Fin field effect transistor and fabricating method thereof'20179,715,987'Semiconductor device and related manufacturing method'20179,673,322'Vertical junctionless transistor device and manufacturing methods'20179,647,067'FinFET and fabrication method thereof'20179,647,107'Fabrication method for forming vertical transistor on hemispherical or polygonal patterned semiconductor substrate'20179,640,615'Method for making III-V nanowire quantum well transistor'20179,634,133'Method of forming fin structure on patterned substrate that includes depositing quantum well layer over fin structure'20179,634,151'High voltage junctionless field effect device and its method of fabrication'20179,608,115'FinFET having buffer layer between channel and substrate'20179,607,902'Semiconductor structures and fabrication methods thereof'20179,590,031'Fin-type field effect transistor and manufacturing method thereof'20179,577,063'Bipolar transistor, band-gap reference circuit and virtual ground reference circuit and methods of fabricating thereof'20179,530,977'Tunneling nanotube field effect transistor and manufacturing method thereof'20169,508,606'Tunneling field effect transistor device and related manufacturing method'20169,502,674'Carbon nanotube neuron device and method for making the same'20169,502,583'Complementary high mobility nanowire neuron device'20169,490,300'Complementary carbon nanotube neuron device'20169,425,101'FinFET fabrication method using buffer layers between channel and semiconductor substrate'20169,337,324'Bipolar transistor, band-gap reference circuit and virtual ground reference circuit'20169,306,122'Light emitting diode and a manufacturing method thereof, a light emitting device'20169,202,985'Light emitting diode and forming method thereof'20159,202,762'Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing'20159,153,585'Tunneling field effect transistor device and related manufacturing method'20159,093,508'Nano field-effect vacuum tube'20159,082,891'Methods for manufacturing isolated deep trench and high-voltage LED chip'20159,054,021'Transistors and fabrication method'20159,029,211'Nano field-effect vacuum tube and fabrication method thereof'20158,969,108'Light emitting diode and forming method thereof'20158,937,322'Light emitting diode and a manufacturing method thereof, a light emitting device'20158,912,545'Nanowires, nanowire fielde-effect transistors and fabrication method'20148,859,354'Transistors and fabrication method thereof'20148,833,431'Aluminum alloy material and method of manufacturing aluminum alloy backboard'20148,815,680'Non-volatile memory having nano crystalline silicon hillocks floating gate'20148,710,549'MOS device for eliminating floating body effects and self-heating effects'20148,704,227'Light emitting diode and fabrication method thereof'20148,614,487'Split dual gate field effect transistor'20138,580,587'Light emitting device and manufacturing method thereof'20138,513,727'Surrounding stacked gate multi-gate FET structure nonvolatile memory device'20138,451,646'Resistive random access memory and the method of operating the same'20138,422,288'DRAM cell utilizing floating body effect and manufacturing method thereof'20138,409,962'Manufacturing method of copper interconnection structure with MIM capacitor'20138,354,721'Gate-all-around CMOSFET devices'20138,350,298'Hybrid material inversion mode GAA CMOSFET'20138,330,229'Hybrid orientation inversion mode GAA CMOSFET'20128,330,228'Hybrid material inversion mode GAA CMOSFET'20128,274,119'Hybrid material accumulation mode GAA CMOSFET'20128,274,118'Hybrid material accumulation mode GAA CMOSFET'20128,264,042'Hybrid orientation accumulation mode GAA CMOSFET'20128,264,863'Green transistor for nano-Si ferro-electric RAM and method of operating the same'20128,233,312'DRAM cell utilizing floating body effect and manufacturing method thereof'20128,217,471'System and method for metal-oxide-semiconductor field effect transistor'20128,208,286'Green transistor for resistive random access memory and method of operating the same'20128,093,114'Method for making split dual gate field effect transistor'20127,582,517'Method for making split dual gate field effect transistor'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009–2015Patents assigned to SEMICONDUCTOR MFG INT SHANGHAI (13)· patent assignee history
2009–2020Based in Shanghai, CN· patent location history
2012–2015Patents assigned to XIAO DEYUAN (25)· patent assignee history
2012–2014Patents assigned to SHANGHAI INST MICROSYS & INF (11)· patent assignee history
2016–2020Patents assigned to SEMICONDUCTOR MFG INT SHANGHAI CORP (27)· patent assignee history
2017–2020Patents assigned to ZING SEMICONDUCTOR CORP (22)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SEMICONDUCTOR MFG INT SHANGHAI CORP272016–2020
XIAO DEYUANself252012–2015
ZING SEMICONDUCTOR CORP222017–2020
SEMICONDUCTOR MFG INT SHANGHAI132009–2015
SHANGHAI INST MICROSYS & INF112012–2014
Locations
LocationPatentsSpan
Shanghai, CN872009–2020