Inventor
Chi-Hsuen Chang
Inventor
Hsinchu, TW
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices54%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1038%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
7,521,741'Shielding structures for preventing leakages in high voltage MOS devices'20097,498,653'Semiconductor structure for isolating integrated circuits of various operating voltages'20097,436,043'N-well and N+ buried layer isolation by auto doping to reduce chip size'20087,301,185'High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage'20077,253,114'Self-aligned method for defining a semiconductor gate oxide in high voltage device area'20077,205,630'Method and apparatus for a semiconductor device having low and high voltage transistors'20077,196,392'Semiconductor structure for isolating integrated circuits of various operation voltages'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2009Patents assigned to TAIWAN SEMICONDUCTOR MFG (7)· patent assignee history
2007–2009Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 7 | 2007–2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 7 | 2007–2009 |