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Inventor

Fu-Jier Fahn

Inventor
Hsinchu, TW

Overview

3→
Patents
2001–2003
Patent span
Electricity
Primary field (CPC H)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1029%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H10BElectronic memory devices14%
H10DInorganic electric semiconductor devices14%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests14%
PatentTitleYear
6,534,396'Patterned conductor layer pasivation method with dimensionally stabilized planarization'20036,194,288'Implant N2 into a pad oxide film to mask the active region and grow field oxide without Si3N4 film'20016,171,978'Method of manufacturing capacitor dielectric'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2003Patents assigned to TAIWAN SEMICONDUCTOR MFG (3)· patent assignee history
2001Based in Hsinchu, TW· patent location history
2003Based in Jubei, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG32001–2003
Locations
LocationPatentsSpan
Hsinchu, TW22001
Jubei, TW12003