Inventor
William Leong
Inventor
San Francisco, CA, US
Overview
Patents· 29 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique48%
G11CStatic stores28%
G01RMeasuring electric variables24%
PatentTitleYear
6,897,679'Programmable logic array integrated circuits'2005RE038651'Variable depth and width memory device'20046,396,304'Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks'20026,278,291'Programmable logic array devices with interconnect lines of various lengths'20016,134,173'Programmable logic array integrated circuits'20006,128,692'Programming and verification address generation for random access memory blocks in programmable logic array integrated circuit devices'20006,127,846'Programmable logic array devices with interconnect lines of various lengths'20006,064,599'Programmable logic array integrated circuits'20006,028,808'Programmable logic array integrated circuits'20006,023,439'Programmable logic array integrated circuits'20006,018,490'Programmable logic array integrated circuits'20005,900,743'Programmable logic array devices with interconnect lines of various lengths'19995,883,850'Programmable logic array integrated circuits'19995,848,005'Programmable logic array integrated circuits'19985,838,628'Programmable logic array integrated circuits'19985,828,229'Programmable logic array integrated circuits'19985,812,479'Programmable logic array integrated circuits'19985,764,583'Programmable logic array integrated circuits'19985,705,939'Programmable logic array integrated circuits with segmented, selectively connectable, long interconnection conductors'19985,668,771'Programmable logic array integrated circuits'19975,614,840'Programmable logic array integrated circuits with segmented, selectively connectable, long interconnection conductors'19975,598,109'Programmable logic array device with grouped logic regions and three types of conductors'19975,592,106'Programmable logic array integrated circuits with interconnection conductors of overlapping extent'19975,550,782'Programmable logic array integrated circuits'19965,543,732'Programmable logic array devices with interconnect lines of various lengths'19965,541,530'Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks'19965,537,057'Programmable logic array device with grouped logic regions and three types of conductors'19965,473,266'Programmable logic device having fast programmable logic array blocks and a central global interconnect array'19955,341,044'Flexible configuration logic array block for programmable logic devices'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2005Patents assigned to ALTERA CORP (29)· patent assignee history
1994–2005Based in San Francisco, CA, US· patent location history
1996Based in San Bernardino, CA, US· patent location history
2000Based in ALL OF, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ALTERA CORP | 29 | 1994–2005 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Francisco, California, US | 27 | 1994–2005 |
| ALL OF, California, US | 1 | 2000 |
| San Bernardino, California, US | 1 | 1996 |