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Inventor

Michael D. Church

Inventor
Sebastian, FL, US

Overview

45→
Patents
1995–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 45 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices25%
G11CStatic stores16%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
G05FSystems for regulating electric or magnetic variables6%
H03FAmplifiers6%
H03GControl of amplification6%
H03KPulse technique6%
H03MCoding6%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H01LSemiconductor devices3%
PatentTitleYear
9,147,613'Method of forming an insulator layer in a semiconductor structure and structures resulting therefrom'20158,946,912'Active area bonding compatible high current structures'20158,796,739'Ballasted polycrystalline fuse'20148,728,875'Ballasted polycrystalline fuse'20148,652,960'Active area bonding compatible high current structures'20148,647,971'Method of manufacturing junction barrier schottky diode with dual silicides'20148,569,896'Active area bonding compatible high current structures'20138,426,745'Thin film resistor'20138,368,166'Junction barrier Schottky diode'20138,345,488'Flash memory array of floating gate-based non-volatile memory cells'20138,325,522'Memory array of floating gate-based non-volatile memory cells'20128,320,180'Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general purpose CMOS technology with thick gate oxide'20128,315,100'Memory array of floating gate-based non-volatile memory cells'20128,274,160'Active area bonding compatible high current structures'20128,268,693'Method for fabricating a radiation hardened device'20128,218,370'Memory array of floating gate-based non-volatile memory cells'20128,101,511'Method of manufacturing a junction barrier Schottky diode with dual silicides'20128,101,977'Ballasted polycrystalline fuse'20128,000,139'Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general purpose CMOS technology with thick gate oxide'20117,944,745'Flash memory array of floating gate-based non-volatile memory cells'20117,903,465'Memory array of floating gate-based non-volatile memory cells'20117,829,970'Junction barrier schottky diode having high reverse blocking voltage'20107,804,143'Radiation hardened device'20107,795,130'Active area bonding compatible high current structures'20107,750,426'Junction barrier Schottky diode with dual silicides'20107,709,907'ESD structure'20107,700,977'Integrated circuit with a subsurface diode'20107,688,627'Flash memory array of floating gate-based non-volatile memory cells'20107,542,342'Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general-purpose CMOS technology with thick gate oxide'20097,224,074'Active area bonding compatible high current structures'20077,005,369'Active area bonding compatible high current structures'20066,921,690'Method of fabricating enhanced EPROM structures with accentuated hot electron generation regions'20056,812,108'BICMOS process with low temperature coefficient resistor (TCRL)'20046,798,024'BiCMOS process with low temperature coefficient resistor (TCRL)'20046,621,116'Enhanced EPROM structures with accentuated hot electron generation regions'20036,566,705'Enhanced EPROM structures with accentuated hot electron generation regions'20036,492,225'Method of fabricating enhanced EPROM structures with accentuated hot electron generation regions'20026,350,640'CMOS integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistor'20026,329,260'Analog-to-digital converter and method of fabrication'20015,994,755'Analog-to-digital converter and method of fabrication'19995,856,695'BiCMOS devices'19995,851,864'Method of fabricating BiCMOS devices'19985,817,564'Double diffused MOS device and method'19985,481,129'Analog-to-digital converter'19965,416,351'Electrostatic discharge protection'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–1999Patents assigned to HARRIS CORP (5)· patent assignee history
1995–2015Based in Sebastian, FL, US· patent location history
2001–2015Patents assigned to INTERSIL INC (32)· patent assignee history
2012–2015Patents assigned to CHURCH MICHAEL D (9)· patent assignee history
2012–2014Patents assigned to KALNITSKY ALEXANDER (7)· patent assignee history
2012–2014Patents assigned to CHURCH MICHAEL DAVID (6)· patent assignee history
2012–2015Based in Canyon Lake, FL, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTERSIL INC322001–2015
CHURCH MICHAEL Dself92012–2015
KALNITSKY ALEXANDER72012–2014
CHURCH MICHAEL DAVIDself62012–2014
HARRIS CORP51995–1999
Locations
LocationPatentsSpan
Sebastian, Florida, US361995–2015
Canyon Lake, Florida, US92012–2015