Inventor
Edward Aung
Inventor
San Leandro, CA, US
Overview
Patents· 9 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Lprimary
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses30%
H04LTransmission of digital information, e.g. telegraphic communication20%
G06FElectric digital data processing17%
H03KPulse technique13%
G11CStatic stores10%
H03MCoding10%
PatentTitleYear
7,684,532'Clock data recovery circuitry associated with programmable logic device circuitry'20107,427,881'Clock loss detection and switchover circuit'20087,333,570'Clock data recovery circuitry associated with programmable logic device circuitry'20087,242,229'Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user mode'20077,227,918'Clock data recovery circuitry associated with programmable logic device circuitry'20077,046,048'Clock loss detection and switchover circuit'20066,891,401'Clock loss detection and switchover circuit'20056,469,553'Phase-locked loop circuitry for programmable logic devices'20026,218,876'Phase-locked loop circuitry for programmable logic devices'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2010Patents assigned to ALTERA CORP (9)· patent assignee history
2001–2002Based in Santa Clara, CA, US· patent location history
2005–2010Based in San Leandro, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ALTERA CORP | 9 | 2001–2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Leandro, California, US | 7 | 2005–2010 |
| Santa Clara, California, US | 2 | 2001–2002 |