LexDanaLexDanabeta
Inventor

Donald A. Kerth

Inventor
Austin, TX, US

Overview

74→
Patents
1986–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 74 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H04Bprimary
H04BTransmission30%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses11%
H03MCoding11%
H05KPrinted circuits7%
Y10TTechnical subjects covered by former us classification7%
H03JTuning resonant circuits4%
H04LTransmission of digital information, e.g. telegraphic communication4%
H03FAmplifiers3%
H04WWireless communication networks3%
G01DMeasuring not specially adapted for a specific variable2%
PatentTitleYear
9,095,041'Method and apparatus for reducing interference'20159,013,232'Method and apparatus for reducing interference'20159,000,838'Method and apparatus for reducing interference'20158,948,708'Partitioned radio-frequency apparatus and associated methods'20158,843,080'Partitioned radio-frequency apparatus and associated methods'20148,682,275'Apparatus and methods for reducing interference in radio-frequency apparatus'20148,648,653'Method and apparatus for reducing interference'20148,532,236'Quadrature signal generation in radio-frequency apparatus and associated methods'20138,489,058'Receiver, system, and memory with memory protection during power supply transitions'20138,467,483'Radio-frequency apparatus and associated methods'20138,422,964'Partitioned radio-frequency apparatus and associated methods'20138,421,529'Method and apparatus for reducing interference'20138,224,259'Digital architecture for radio-frequency apparatus and associated methods'20128,154,336'Method and apparatus for reducing interference'20128,150,358'Method for performing dual mode image rejection calibration in a receiver'20127,979,048'Quasi non-volatile memory for use in a receiver'20117,941,102'Partitioned radio-frequency apparatus and associated methods'20117,884,666'Method and apparatus for reducing interference'20117,783,274'Chopped intermediate frequency wireless receiver'20107,702,362'Digital architecture for radio-frequency apparatus and associated methods'20107,689,190'Controlling the frequency of an oscillator'20107,676,210'Method for performing dual mode image rejection calibration in a receiver'20107,653,356'System and method for reducing spurious emissions in a wireless communication device including a testing apparatus'20107,650,119'Wireless communication system and method using digital calibration to control mixer input swing'20107,609,781'Wireless communication device with self calibration feature for controlling power output'20097,583,946'Wireless communication system and method using clock swapping during image rejection calibration'20097,366,478'Partitioned radio-frequency apparatus and associated methods'20087,333,831'Interchangeable receive inputs for band and system swappability in communication systems and related methods'20087,292,091'Method and apparatus for reducing interference'20077,285,940'Voltage regulator with shunt feedback'20077,280,001'Capacitor array segmentation'20077,272,374'Dynamic selection of local oscillator signal injection for image rejection in integrated receivers'20077,242,912'Partitioning of radio-frequency apparatus'20077,228,109'DC offset reduction in radio-frequency apparatus and associated methods'20077,221,921'Partitioning of radio-frequency apparatus'20077,206,560'Chopped intermediate frequency wireless receiver'20077,199,650'Method and apparatus for reducing interference'20077,177,617'Method and apparatus for enhancing signal quality within a wireless receiver'20077,177,610'Calibrated low-noise current and voltage references and associated methods'20077,138,858'Apparatus and methods for output buffer circuitry with constant output power in radio-frequency circuitry'20067,092,675'Apparatus and methods for generating radio frequencies in communication circuitry using multiple control signals'20067,035,611'Apparatus and method for front-end circuitry in radio-frequency apparatus'20067,031,683'Apparatus and methods for calibrating signal-processing circuitry'20067,024,221'Notch filter for DC offset reduction in radio-frequency apparatus and associated methods'20066,993,314'Apparatus for generating multiple radio frequencies in communication circuitry and associated methods'20066,970,717'Digital architecture for radio-frequency apparatus and associated methods'20056,946,898'System and method for biasing electrical circuits'20056,804,497'Partitioned radio-frequency apparatus and associated methods'20046,650,264'Quadrature sampling architecture and method for analog-to-digital converters'20036,311,050'Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same'20016,226,506'Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications'20016,148,048'Receive path implementation for an intermediate frequency transceiver'20005,729,229'Data independent loading of a reference in a sampled data integrator'19985,717,321'Drive current calibration for an analog resistive touch screen'19985,644,308'Algorithmic analog-to-digital converter having redundancy and digital calibration'19975,644,257'Sampling circuit charge management'19975,621,339'Method and apparatus for removing trapped oxide charge from a differential input stage'19975,583,501'Digital-to-analog converter with digital linearity correction'19965,579,247'Method and apparatus for decreasing the interference and noise sensitivity of a ratiometric converter type of circuit'19965,541,599'Data independent loading of a reference in a discrete time system'19965,477,481'Switched-capacitor integrator with chopper stabilization performed at the sampling rate'19955,412,348'Compound triple cascoded mirror'19955,376,936'One-bit switched-capacitor D/A circuit with continuous time linearity'19945,319,319'Low drift resistor structure for amplifiers'19945,268,651'Low drift resistor structure'19935,212,659'Low precision finite impulse response filter for digital interpolation'19935,172,115'Ratiometric A/D converter with non-rationometric error offset'19925,079,550'Combining continuous time and discrete time signal processing in a delta-sigma modulator'19925,061,925'Phase equalization system for a digital-to-analog converter utilizing separate digital and analog sections'19915,039,989'Delta-sigma analog-to-digital converter with chopper stabilization at the sampling frequency'19915,012,244'Delta-sigma modulator with oscillation detect and reset circuit'19914,804,863'Method and circuitry for generating reference voltages'19894,748,418'Quasi auto-zero circuit for sampling amplifiers'19884,588,941'Cascode CMOS bandgap reference'1986

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1986Based in Berks, GB· patent location history
1988–1997Patents assigned to CRYSTAL SEMICONDUCTOR CORP (16)· patent assignee history
1988–2015Based in Austin, TX, US· patent location history
1998–2003Patents assigned to CIRRUS LOGIC INC (4)· patent assignee history
2001–2015Patents assigned to SILICON LAB INC (40)· patent assignee history
2010–2015Patents assigned to KERTH DONALD A (12)· patent assignee history
2010–2014Patents assigned to VISHAKHADATTA G DIWAKAR (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SILICON LAB INC402001–2015
CRYSTAL SEMICONDUCTOR CORP161988–1997
KERTH DONALD Aself122010–2015
VISHAKHADATTA G DIWAKAR52010–2014
CIRRUS LOGIC INC41998–2003
Locations
LocationPatentsSpan
Austin, Texas, US731988–2015
Berks, GB11986