Inventor
Hsiang-Lan Lung
Inventor
Elmsford, NY, US
Overview
Patents· 297 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices28%
H10NElectric solid-state devices not otherwise provided for26%
G11CStatic stores22%
H01LSemiconductor devices7%
H10DInorganic electric semiconductor devices6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h101%
B82YSpecific uses or applications of nanostructures1%
C23CCoating metallic material0%
PatentTitleYear
11,069,7043D NOR memory having vertical gate structures202111,037,947Array of pillars located in a uniform pattern202110,978,466Array of pillars located in a uniform pattern202110,978,511Semiconductor device and memory cell202110,950,786Layer cost scalable 3D phase change cross-point memory202110,937,8323D memory with confined cell202110,915,248Memory device202110,916,560Crenellated charge storage structures for 3D NAND202110,910,3933D NOR memory having vertical source and drain structures202110,840,254Pitch scalable 3D NAND202010,818,729Bit cost scalable 3D phase change cross-point memory202010,672,469In-memory convolution for machine learning202010,636,812Reducing word line capacitance in 3D memory202010,593,875Self-aligned 3D memory with confined cell202010,541,271Superlattice-like switching devices202010,515,810Self-aligned di-silicon silicide bit line and source line landing pads in 3D vertical channel memory201910,497,714Three dimensional memory device with etch-stop structure201910,497,437Decoding scheme for 3D cross-point memory array201910,475,811Memory device and method for fabricating the same201910,453,856Low resistance vertical channel 3D memory201910,374,009Te-free AsSeGe chalcogenides for selector devices and memory devices using same201910,332,835Memory device and method for fabricating the same201910,163,926Memory device and method for fabricating the same201810,157,671Fast switching 3D cross-point array201810,141,221Method for manufacturing three dimensional stacked semiconductor structure and structure manufactured by the same201810,103,167Manufacturing method of semiconductor structure201810,090,250Memory structure and method for manufacturing the same201810,050,196Dielectric doped, Sb-rich GST phase change memory201810,043,819Method for manufacturing 3D NAND memory using gate replacement, and resulting structures201810,026,750Memory device and method for operating the same20189,972,6603D phase change memory with high endurance20189,917,252'GaSbGe phase change memory materials'20189,818,760'Memory structure, method of operating the same, and method of manufacturing the same'20179,799,663'Stacked bit line dual word line nonvolatile memory'20179,793,323'Phase change memory with high endurance'20179,779,813'Phase change memory array architecture achieving high write/read speed'20179,672,906'Phase change memory with inter-granular switching'20179,659,998'Memory having an interlayer insulating structure with different thermal resistance'20179,646,692'Programming verify for nonvolatile memory'20179,570,117'Integrated circuit with independent programmability'20179,558,818'Memory and memory managing method'20179,537,093'Memory structure'20179,507,663'Memory device and operation method'20169,472,274'Refresh of nonvolatile memory cells and reference cells with resistance drift'20169,466,566'Stacked bit line dual word line nonvolatile memory'20169,449,720'Dynamic redundancy repair'20169,336,867'Phase change memory coding'20169,336,879'Multiple phase change materials in an integrated circuit for system on a chip application'20169,236,568'Sidewall thin film electrode with self-aligned top electrode and programmable resistance memory'20169,214,229'Phase change memory material and system for embedded memory applications'20159,166,165'Uniform critical dimension size pore for PCRAM application'20159,082,954'PCRAM with current flowing laterally relative to axis defined by electrodes'20159,064,794'Integrated circuit including vertical diode'20159,019,771'Dielectric charge trapping memory cells with redundancy'20159,018,692'Low cost scalable 3D memory'20159,001,550'Blocking current leakage in a memory array'20158,987,700'Thermally confined electrode for programmable resistance memory'20158,981,330'Thermally-confined spacer PCM cells'20158,975,122'Stacked bit line dual word line nonvolatile memory'20158,964,442'Integrated circuit 3D phase change memory array and manufacturing method'20158,946,671'Mask read only memory containing diodes and method of manufacturing the same'20158,946,666'Ge-Rich GST-212 phase change memory materials'20158,933,536'Polysilicon pillar bipolar transistor with self-aligned memory element'20158,927,957'Sidewall diode driving device and memory using same'20158,916,414'Method for making memory cell by melting phase change material in confined space'20148,912,515'Manufacturing method for pipe-shaped electrode phase change memory'20148,907,316'Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions'20148,860,111'Phase change memory cell array with self-converged bottom electrode and method for manufacturing'20148,853,047'Self aligned fin-type programmable memory cell'20148,829,646'Integrated circuit 3D memory array and manufacturing method'20148,809,828'Small footprint phase change memory cell'20148,772,747'Composite target sputtering for forming doped phase change materials'20148,728,859'Small footprint phase change memory cell'20148,729,521'Self aligned fin-type programmable memory cell'20148,679,917'Buried bit line anti-fuse one-time-programmable nonvolatile memory'20148,664,689'Memory cell access device having a pn-junction with polycrystalline plug and single-crystal semiconductor regions'20148,637,844'Method for fabrication of crystalline diodes for resistive memories'20148,634,235'Phase change memory coding'20148,624,236'Phase change memory cell having vertical channel access transistor'20148,624,299'Stacked bit line dual word line nonvolatile memory'20148,610,098'Phase change memory bridge cell with diode isolation device'20138,605,495'Isolation device free memory'20138,586,960'Integrated circuit including vertical diode'20138,525,290'Method of forming memory cell access device'20138,513,637'4F2 self align fin bottom electrodes FET drive phase change memory'20138,497,705'Phase change device for interconnection of programmable logic device'20138,497,182'Sidewall thin film electrode with self-aligned top electrode and programmable resistance memory'20138,476,157'Buried bit line anti-fuse one-time-programmable nonvolatile memory'20138,471,236'Flat lower bottom electrode for phase change memory cell'20138,445,313'Method for forming a self-aligned bit line for PCRAM and self-aligned etch back process'20138,437,192'3D two bit-per-cell NAND flash memory'20138,426,294'3D memory array arranged for FN tunneling program and erase'20138,426,242'Composite target sputtering for forming doped phase change materials'20138,415,651'Phase change memory cell having top and bottom sidewall contacts'20138,406,033'Memory device and method for sensing and fixing margin cells'20138,395,935'Cross-point self-aligned reduced cell size phase change memory'20138,363,463'Phase change memory having one or more non-constant doping profiles'20138,350,316'Phase change memory cells having vertical channel access transistor and memory plane'20138,324,605'Dielectric mesh isolated phase change structure for phase change memory'20128,313,979'Phase change memory cell having vertical channel access transistor'20128,315,088'Multiple phase change materials in an integrated circuit for system on a chip application'20128,310,864'Self-aligned bit line under word line memory array'20128,283,650'Flat lower bottom electrode for phase change memory cell'20128,273,598'Method for forming a self-aligned bit line for PCRAM and self-aligned etch back process'20128,263,960'Phase change memory cell with filled sidewall memory element and method for fabricating the same'20128,237,140'Self-aligned, embedded phase change RAM'20128,238,149'Methods and apparatus for reducing defect bits in phase change memory'20128,237,144'Polysilicon plug bipolar transistor for phase change memory'20128,237,148'4F2 self align side wall active phase change memory'20128,228,721'Refresh circuitry for phase change memory'20128,222,071'Method for making self aligning pillar memory cell device'20128,203,187'3D memory array arranged for FN tunneling program and erase'20128,178,386'Phase change memory cell array with self-converged bottom electrode and method for manufacturing'20128,173,987'Integrated circuit 3D phase change memory array and manufacturing method'20128,164,146'Substrate symmetrical silicide source/drain surrounding gate transistor'20128,154,128'3D integrated circuit layer interconnect'20128,143,612'Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing'20128,143,089'Self-align planerized bottom electrode phase change memory and manufacturing method'20128,138,028'Method for manufacturing a phase change memory device with pillar bottom electrode'20128,115,186'Phase change memory cell with reduced switchable volume'20128,110,430'Vacuum jacket for phase change memory element'20128,110,456'Method for making a self aligning memory device'20128,101,938'Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method'20128,097,487'Method for making a phase change memory device with vacuum cell thermal isolation'20128,093,661'Integrated circuit device with single crystal silicon on silicide and manufacturing method'20128,089,137'Integrated circuit memory with single crystal silicon on silicide driver and manufacturing method'20128,084,760'Ring-shaped electrode and manufacturing method for same'20118,064,248'2T2R-1T1R mix mode phase change memory array'20118,063,428'Two-bits per cell not-and-gate (NAND) nitride trap memory'20118,062,923'Thin film fuse phase change cell with thermal isolation pad and manufacturing method'20118,059,449'Phase change device having two or more substantial amorphous regions in high resistance state'20118,030,635'Polysilicon plug bipolar transistor for phase change memory'20118,030,634'Memory array with diode driver and method for fabricating the same'20118,026,505'Memory device'20118,008,643'Phase change memory cell with heater and method for fabricating the same'20118,008,114'Phase change memory device and manufacturing method'20117,993,962'I-shaped phase change memory cell'20117,985,989'Stacked bit line dual word line nonvolatile memory'20117,978,509'Phase change memory with dual word lines and source lines and method of operating same'20117,972,895'Memory cell device with coplanar electrode surface and method'20117,968,861'Phase change memory element'20117,968,876'Phase change memory cell having vertical channel access transistor'20117,964,468'Multi-level memory cell having phase change element and asymmetrical thermal boundary'20117,964,863'Memory cell having a side electrode contact'20117,964,437'Memory device having wide area phase change element and small electrode contact area'20117,956,344'Memory cell with memory element contacting ring-shaped upper end of bottom electrode'20117,955,958'Method for fabrication of polycrystalline diodes for resistive memories'20117,935,564'Self-converging bottom electrode ring'20117,932,101'Thermally contained/insulated phase change memory device and method'20117,932,507'Current constricting phase change memory element structure'20117,932,129'Vertical side wall active pin structures in a phase change memory and manufacturing methods'20117,932,506'Fully self-aligned pore-type memory cell having diode access device'20117,933,139'One-transistor, one-resistor, one-capacitor phase change memory'20117,929,340'Phase change memory cell and manufacturing method'20117,928,421'Phase change memory cell with vacuum spacer'20117,923,713'High density chalcogenide memory cells'20117,920,415'Memory cell device and programming methods'20117,919,766'Method for making self aligning pillar memory cell device'20117,910,907'Manufacturing method for pipe-shaped electrode phase change memory'20117,910,911'Phase change memory with tapered heater'20117,910,906'Memory cell device with circumferentially-extending memory element'20117,906,368'Phase change memory with tapered heater'20117,903,457'Multiple phase change materials in an integrated circuit for system on a chip application'20117,903,447'Method, apparatus and computer program product for read before programming process on programmable resistive memory cell'20117,902,051'Method for fabrication of single crystal diodes for resistive memories'20117,902,538'Phase change memory cell with first and second transition temperature portions'20117,901,979'Method of forming a small contact in phase-change memory'20117,894,254'Refresh circuitry for phase change memory'20117,893,418'Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods'20117,888,666'Common word line edge contact phase-change memory'20117,884,342'Phase change memory bridge cell'20117,884,343'Phase change memory cell with filled sidewall memory element and method for fabricating the same'20117,879,645'Fill-in etching free pore device'20117,879,692'Programmable resistive memory cell with self-forming gap'20117,879,643'Memory cell with memory element contacting an inverted T-shaped bottom electrode'20117,875,493'Memory structure with reduced-size memory element between memory material portions'20117,868,313'Phase change memory device and method of manufacture'20117,867,815'Spacer electrode small pin phase change RAM and manufacturing method'20117,863,655'Phase change memory cells with dual access devices'20117,842,536'Vacuum jacket for phase change memory element'20107,829,876'Vacuum cell thermal isolation for a phase change memory device'20107,825,396'Self-align planerized bottom electrode phase change memory and manufacturing method'20107,825,398'Memory cell having improved mechanical stability'20107,791,057'Memory cell having a buried phase change region and method for fabricating the same'20107,786,000'Buried bit line anti-fuse one-time-programmable nonvolatile memory'20107,786,461'Memory structure with reduced-size memory element between memory material portions'20107,785,920'Method for making a pillar-type phase change memory element'20107,786,460'Phase change memory device and manufacturing method'20107,772,581'Memory device having wide area phase change element and small electrode contact area'20107,755,935'Block erase for phase change memory'20107,755,076'4F2 self align side wall active phase change memory'20107,749,854'Method for making a self-converged memory material element for memory cell'20107,745,807'Current constricting phase change memory element structure'20107,728,384'Magnetic random access memory using single crystal self-aligned diode'20107,729,161'Phase change memory with dual word lines and source lines and method of operating same'20107,719,913'Sensing circuit for PCRAM applications'20107,701,759'Memory cell device and programming methods'20107,701,750'Phase change device having two or more substantial amorphous regions in high resistance state'20107,700,415'Stacked bit line dual word line nonvolatile memory'20107,696,506'Memory cell with memory material insulation and manufacturing method'20107,696,503'Multi-level memory cell having phase change element and asymmetrical thermal boundary'20107,687,307'Vacuum jacketed electrode for phase change memory element'20107,688,619'Phase change memory cell and manufacturing method'20107,682,868'Method for making a keyhole opening during the manufacture of a memory cell'20107,683,360'Horizontal chalcogenide element defined by a pad for use in solid-state memories'20107,675,787'Two-bits per cell not-and-gate (NAND) nitride trap memory'20107,663,135'Memory cell having a side electrode contact'20107,646,631'Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods'20107,642,539'Thin film fuse phase change cell with thermal isolation pad and manufacturing method'20107,642,123'Thermally insulated phase change memory manufacturing method'20107,642,125'Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing'20107,638,359'Method for making a self-converged void and bottom electrode for memory cell'20097,638,855'Anti-fuse one-time-programmable nonvolatile memory'20097,635,855'I-shaped phase change memory cell'20097,619,311'Memory cell device with coplanar electrode surface and method'20097,619,237'Programmable resistive memory cell with self-forming gap'20097,608,503'Side wall active pin memory and manufacturing method'20097,608,882'Split-gate non-volatile memory'20097,579,613'Thin film fuse phase change RAM and manufacturing method'20097,569,844'Memory cell sidewall contacting side electrode'20097,561,463'Thin film phase-change memory'20097,551,473'Programmable resistive memory with diode structure'20097,534,713'High density chalcogenide memory cells'20097,535,756'Method to tighten set distribution for PCRAM'20097,534,647'Damascene phase change RAM and manufacturing method'20097,514,288'Manufacturing methods for thin film fuse phase change ram'20097,514,334'Thin film plate phase change RAM circuit and manufacturing method'20097,515,461'Current compliant sensing architecture for multilevel phase change memory'20097,514,367'Method for manufacturing a narrow structure on an integrated circuit'20097,507,986'Thermal isolation for an active-sidewall phase change memory cell'20097,504,653'Memory cell device with circumferentially-extending memory element'20097,483,292'Memory cell with separate read and program paths'20097,479,649'Vacuum jacketed electrode for phase change memory element'20097,476,587'Method for making a self-converged memory material element for memory cell'20097,473,576'Method for making a self-converged void and bottom electrode for memory cell'20097,474,567'Method for programming multi-level nitride read-only memory cells'20097,471,555'Thermally insulated phase change memory device'20087,463,512'Memory element with reduced-current phase change element'20087,459,717'Phase change memory cell and manufacturing method'20087,456,421'Vertical side wall active pin structures in a phase change memory and manufacturing methods'20087,456,460'Phase change memory element and method of making the same'20087,450,411'Phase change memory device and manufacturing method'20087,449,710'Vacuum jacket for phase change memory element'20087,440,315'Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell'20087,433,226'Method, apparatus and computer program product for read before programming process on multiple programmable resistive memory cell'20087,432,206'Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram'20087,423,300'Single-mask phase change memory element'20087,420,242'Stacked bit line dual word line nonvolatile memory'20087,414,258'Spacer electrode small pin phase change memory RAM and manufacturing method'20087,397,060'Pipe shaped phase change memory'20087,394,088'Thermally contained/insulated phase change memory device and method (combined)'20087,388,252'Two-bits per cell not-and-gate (NAND) nitride trap memory'20087,385,235'Spacer chalcogenide memory device'20087,364,935'Common word line edge contact phase-change memory'20087,323,732'MRAM array employing spin-filtering element connected by spin-hold element to MRAM cell structure for enhanced magnetoresistance'20087,321,130'Thin film fuse phase change RAM and manufacturing method'20087,314,815'Manufacturing method of one-time programmable read only memory'20087,279,380'Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method'20077,251,167'Method for programming multi-level nitride read-only memory cells'20077,247,511'Thin film phase-change memory'20077,238,994'Thin film plate phase change ram circuit and manufacturing method'20077,220,983'Self-aligned small contact phase-change memory method and device'20077,209,389'Trap read only non-volatile memory (TROM)'20077,202,493'Chalcogenide memory having a small active region'20077,196,924'Method of multi-level cell FeRAM'20077,158,420'Inversion bit line, charge trapping non-volatile memory and method of operating same'20077,138,687'Thin film phase-change memory'20067,067,865'High density chalcogenide memory cells'20067,053,406'One-time programmable read only memory and manufacturing method thereof'20067,038,928'Method of determining optimal voltages for operating two-side non-volatile memory and the operating methods'20067,038,230'Horizontal chalcogenide element defined by a pad for use in solid-state memories'20067,033,856'Spacer chalcogenide memory method'20066,984,548'Method of making a nonvolatile memory programmable by a heat induced chemical reaction'20066,965,522'Tunneling diode magnetic junction memory'20056,960,801'High density single transistor ferroelectric non-volatile memory'20056,956,774'Nonvolatile memory programmable by a heat induced chemical reaction'20056,952,038'3D polysilicon ROM and method of fabrication thereof'20056,940,757'Structure and operating method for nonvolatile memory cell'20056,927,136'Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof'20056,914,282'Ferroelectric device and method for making'20056,893,912'Ferroelectric capacitor memory device fabrication method'20056,894,340'Non-volatile semiconductor memory cell utilizing poly-edge discharge'20056,873,541'Nonvolatile memory programmble by a heat induced chemical reaction'20056,864,503'Spacer chalcogenide memory method and device'20056,838,692'Chalcogenide memory device with multiple bits per cell'20056,830,952'Spacer chalcogenide memory method and device'20046,828,081'Method and system for lithography using phase-change material'20046,750,101'Method of manufacturing self-aligned, programmable phase change memory'20046,587,368'Non-volatile memory circuit'20036,579,760'Self-aligned, programmable phase change memory'20036,576,479'Method for forming vertical ferroelectric capacitor comprising forming ferroelectric material in gap between electrodes'20036,574,134'Non-volatile ferroelectric capacitor memory circuit having nondestructive read capability'20036,512,687'Non-volatile ferroelectric capacitor memory circuit'20036,388,913'Method for detecting polarization of a ferroelectric capacitor in a ferroelectric memory and thereof structure'20026,385,077'Non-volatile memory cell and sensing method'20026,285,586'Nonvolatile static random access memory'20016,282,118'Nonvolatile semiconductor memory device'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2021Patents assigned to MACRONIX INT CO LTD (285)· patent assignee history
2001–2019Based in Hsinchu, TW· patent location history
2007–2015Based in Elmsford, NY, US· patent location history
2008–2018Patents assigned to IBM (55)· patent assignee history
2009–2015Based in Dobbs Ferry, NY, US· patent location history
2011–2015Patents assigned to LUNG HSIANG-LAN (68)· patent assignee history
2011–2015Patents assigned to SHIH YEN-HAO (14)· patent assignee history
2012–2015Patents assigned to BREITWISCH MATTHEW J (17)· patent assignee history
2013–2021Based in Ardsley, NY, US· patent location history
2017–2021Based in Kaohsiung, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MACRONIX INT CO LTD | 285 | 2001–2021 |
| LUNG HSIANG-LANself | 68 | 2011–2015 |
| IBM | 55 | 2008–2018 |
| BREITWISCH MATTHEW J | 17 | 2012–2015 |
| SHIH YEN-HAO | 14 | 2011–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Elmsford, New York, US | 111 | 2007–2015 |
| Hsinchu, TW | 75 | 2001–2019 |
| Dobbs Ferry, New York, US | 55 | 2009–2015 |
| Ardsley, New York, US | 42 | 2013–2021 |
| Kaohsiung, TW | 12 | 2017–2021 |