Inventor
Chen Zhang
Inventor
Albany, NY, US
Overview
Patents· 38 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices28%
H10DInorganic electric semiconductor devices26%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
B82YSpecific uses or applications of nanostructures6%
H10BElectronic memory devices3%
G11CStatic stores2%
A61KPreparations for medical, dental or toiletry purposes1%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations1%
C07DHeterocyclic compounds1%
PatentTitleYear
11,053,260Tri-cycle compound and applications thereof202111,011,643Nanosheet FET including encapsulated all-around source/drain contact202111,011,411Semiconductor wafer having integrated circuits with bottom local interconnects202111,011,528Asymmetric gate edge spacing for SRAM structures202111,004,856Stacked vertical transistor memory cell with epi connections202110,998,233Mechanically stable complementary field effect transistors202110,991,797Self-aligned two-dimensional material transistors202110,991,798Replacement sacrificial nanosheets having improved etch selectivity2021D0917575Handheld tire inflator202110,991,619Top via process accounting for misalignment by increasing reliability202110,985,064Buried power and ground in stacked vertical transport field effect transistors202110,984,839Voltage regulation circuit202110,985,161Single diffusion break isolation for gate-all-around field-effect transistor devices202110,971,522High mobility complementary metal-oxide-semiconductor (CMOS) devices with fins on insulator202110,964,602Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain202110,964,601Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain202110,964,603Hybrid gate stack integration for stacked vertical transport field-effect transistors202110,957,798Nanosheet transistors with transverse strained channel regions202110,957,783Fin cut etch process for vertical transistor devices202110,957,693Vertical transistors with different gate lengths202110,957,605VFET device design for top contact resistance measurement202110,957,763Gate fill utilizing replacement spacer202110,950,545Circuit wiring techniques for stacked transistor structures202110,944,013Self-aligned source/drain contact for vertical field effect transistor202110,930,778Vertical transistor devices with composite high-K and low-K spacers with a controlled top junction202110,930,756Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates202110,916,640Approach to high-k dielectric feature uniformity202110,910,482Nanosheet with changing SiGe percentage for SiGe lateral recess202110,910,372Fin field effect transistor devices with modified spacer and gate dielectric thicknesses202110,903,123High threshold voltage FET with the same fin height as regular threshold voltage vertical FET202110,903,337Air gap spacer with wrap-around etch stop layer under gate spacer202110,902,910Phase change memory (PCM) with gradual reset characteristics202110,903,212Fin field effect transistor devices with modified spacer and gate dielectric thicknesses202110,903,358Vertical fin field effect transistor with reduced gate length variations202110,896,851Vertically stacked transistors202110,886,391Single-electron transistor with wrap-around gate202110,886,384Fabrication of a vertical fin field effect transistor (vertical finFET) with a self-aligned gate and fin edges202110,859,535Detecting device and method for acoustic emission on high-frequency motion rubbing pair surface2020Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2020Patents assigned to UNIV BEIJING TECHNOLOGY (1)· patent assignee history
2021Patents assigned to IBM (34)· patent assignee history
2021Patents assigned to FUJIAN COSUNTER PHARMACEUTICAL CO LTD (1)· patent assignee history
2021Patents assigned to HUAWEI TECH CO LTD (1)· patent assignee history
2021Patents assigned to SHENZHEN CHENGUO TECH CO LTD (1)· patent assignee history
2021Based in Albany, NY, US· patent location history
2021Based in Guilderland, NY, US· patent location history
2021Based in Shanghai, CN· patent location history
2021Based in Guangdong, CN· patent location history
2021Based in Shenzhen, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 34 | 2021 |
| FUJIAN COSUNTER PHARMACEUTICAL CO LTD | 1 | 2021 |
| HUAWEI TECH CO LTD | 1 | 2021 |
| SHENZHEN CHENGUO TECH CO LTD | 1 | 2021 |
| UNIV BEIJING TECHNOLOGY | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Albany, New York, US | 21 | 2021 |
| Guilderland, New York, US | 13 | 2021 |
| Shanghai, CN | 1 | 2021 |
| Guangdong, CN | 1 | 2021 |
| Shenzhen, CN | 1 | 2021 |