Inventor
Takayuki Shibasaki
Inventor
Kawasaki, JP
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication41%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses34%
H03KPulse technique9%
H04BTransmission7%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner5%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein2%
H03MCoding2%
PatentTitleYear
10,326,582Optical transmitter that includes optical modulator201910,225,069CDR circuit and receiving circuit201910,103,870CDR circuit and reception circuit201810,103,911Receiver circuit and eye monitor system201810,015,005Clock data recovery circuit, electronic device, and clock data recovery method20189,722,616'Reception circuit'20179,614,531'Termination resistance adjustment circuit and device including termination resistance adjustment circuit'20179,520,883'Frequency detection circuit and reception circuit'20169,344,269'Receiving circuit'20169,287,883'Multi-lane re-timer circuit and multi-lane reception system'20169,264,026'Phase interpolation clock generator and phase interpolation clock generating method'20169,191,187'Reception circuit and semiconductor integrated circuit'20159,166,771'Reception circuit'20159,160,521'Timing signal generation circuit'20159,059,837'Clock data recovery circuit and clock data recovery method'20158,983,014'Receiver circuit and semiconductor integrated circuit'20158,861,582'Decision feedback equalizer, receiving circuit, and decision feedback equalization processing method'20148,848,835'Interpolation circuit, reception circuit and method of generating interpolated data'20148,791,735'Receiving circuit and control method of receiving circuit'20148,698,528'CDR circuit, reception circuit, and electronic device'20148,494,103'Reception circuit'20138,299,948'Receiving circuit and sampling clock control method'20128,258,882'Clock signal distributing device'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2019Patents assigned to FUJITSU LTD (23)· patent assignee history
2012–2014Patents assigned to SHIBASAKI TAKAYUKI (5)· patent assignee history
2012Patents assigned to KIBUNE MASAYA (1)· patent assignee history
2012Patents assigned to TAMURA HIROTAKA (1)· patent assignee history
2012Patents assigned to YAMAMOTO TAKUJI (1)· patent assignee history
2012–2019Based in Kawasaki, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 23 | 2012–2019 |
| SHIBASAKI TAKAYUKIself | 5 | 2012–2014 |
| KIBUNE MASAYA | 1 | 2012 |
| TAMURA HIROTAKA | 1 | 2012 |
| YAMAMOTO TAKUJI | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 23 | 2012–2019 |